NXP iMX8 Series - FAQ about Secondary Development of the iMX8MQ Core Board
Forlinx Embedded's FETMX8MQ-C core board based on NXP iMX8MQ and its supporting development board OKMX8MQ-C have been officially released! Provide 10~15 years of product long-term supply, to guarantee the stability of enterprise intelligent products. In response to a few questions that engineers have been paying more attention to recently, a simple Q&A question was made.
Q: Does the iMX8MQ SoM have power-on timing requirements?
A: iMX8MQ SoM has power-up timing requirements, which requires VDD_3V3 control other power supplies on the backplane, and it is recommended that the VDD_3V3 only be used as power-on enable on the backplane and the pull-up and drop function of the BOOT start configuration pin. If used to power the backplane, there is a risk that the core board DC-DC device may be damaged due to improper handling of the backplane.
Q: How to deal with the unused pins of the iMX8MQ core board?
A: The iMX8MQ core board does not use pin dangling, do not add additional pull-ups. The BOOT starts related pins must be handled or the system will not boot properly. It is recommended that the programming interface and debugging serial port are also reserved for debugging.
Q: What is the minimum system for the iMX8MQ core board?
A: In the last section of the Appendix of the Forlinx iMX8MQ Hardware Manual, there are relevant schematics and related instructions. Or ask us online for a consultation and email for more information.
Q:Can the 2-layer board meet the design requirements?
A: When using the Forlinx iMX8MQ core board to design the base plate, if high-speed signal is involved, the 2-layer board is difficult to meet the impedance requirements, and a 4-layer board design is recommended.
Q: Is the iMX8MQ core board heating serious?
A: The heat source of the Forlinx iMX8MQ core board is mainly the CPU, it is recommended that users adapt the corresponding heatsink according to their actual application scenarios, otherwise it may lead to the CPU due to excessive temperature and frequency reduction, reset and other operations.
ps: It is recommended that customers carefully read the "OKMX8MQ-C_ Hardware Design Guide" in the early stage of design, which can avoid a lot of unnecessary work and improve design efficiency. Detailed parameters of SoM are described in the hardware manual.
Q: What are the boot modes supported by iMX8MQ?
A: Forlinx iMX8MQ SoM supports TF card boot and eMMC boot, where TF card boot is used as a programming system.
Q: What are the programming methods supported by iMX8MQ?
A: Forlinx iMX8MQ core board supports USB flashing and TF card flashing. USB flashing is implemented via uuu provided by NXP.
Q: How to use iMX8MQ SoM Cortex-M4?
A: NXP provides a special SDK for M4 core programming, and SDK provides two ways to compile, IAR and GCC.
SDK supports RTOS and bare metal programs and provides many reference routines. Our manual also cites several references to demonstrate how to configure the IAR and GCC compilers.
The user manual provided by Forlinx also provides information on how the IRA can connect to the M4 core for debugging. At the same time, the manual also provides how to run the compiled M4 program, how to package the compiled M4 image into the system image, and how to automatically start the M4 program.
Q: What is the memory configuration supported by the iMX8MQ core board?
A: Forlinx iMX8MQ SoM supports 2GB and 4GB of DDR4 2400, with 2GB of RAM as standard.
Q: What is the display interface support for the iMX8MQ core board?
Q: What video codec formats does iMX8MQ SoM support?
A: Only software encoding is supported
iMX8MQ core board hardware decoding support: 4K supports HEVC/H265, VP9, AVC/H.264, 1080P supports MPEG-2, MPEG-4p2, VC-1, VP8, RV9, AVS, MJPEG, H.263, etc., there is a need to play 4K video, 2GB memory is a bit tight, try to purchase 4GB memory core board.
Q: Can interface support for iMX8MQ SoM?
A: iMX8MQ SoM adds SPI to CANFD chip MCP2518FD.
Q: What is the PCIe interface support?
A: iMX8MQ core board supports 2 PCIe, connected to M.2 KEY M and M.2 KEY E interfaces respectively, and can be connected to NVME SSDs and WiFi modules.