Industrial digitalization relies on cross-device, cross-platform connectivity to eliminate data silos and improve operational efficiency. Yet real-world deployment faces persistent interoperability issues: protocol barriers, costly cabling, unstable signals, and legacy‑to‑new‑system gaps.

Such connection bottlenecks remain key barriers to digital transformation.

The Forlinx FCU1501 Embedded Control Unit is built to solve these challenges. Through optimized connection logic, a comprehensive interface matrix, and industrial‑grade reliability, it acts as the core enabler for seamless, efficient communication across diverse industrial devices.

Comprehensive Interface Resources Fortify the Foundation of ''Connectivity''

The core advantage of the FCU1501 Embedded Control Unit lies in its all‑dimensional interface matrix, covering wired communication, wireless communication, industrial serial ports, high‑speed buses, and digital control. Unlike gateways in the market that require add‑on expansion modules, the FCU1501 interfaces are natively integrated. This eliminates the need for complex retrofitting, enabling seamless ''integration'' of diverse industrial equipment and efficient ''interconnection'' between devices and platforms—perfectly meeting the fragmented connectivity demands of industrial sites.

For instance, in a medium‑sized manufacturing workshop with newly purchased smart PLCs, legacy inverters and meters, as well as environmental sensors, disparate protocols and incompatible interfaces previously prevented centralized data monitoring. With the deployment of the FCU1501 Embedded Control Unit, its extensive interface matrix allowed all devices to be ''integrated'' at once, achieving efficient ''interconnection'' between production data and the monitoring platform. This entirely eliminated information silos and significantly improved operational efficiency.

Stable Wired Communication Ensures Reliable Data Interconnection

In industrial environments, the stability of data transmission directly impacts production efficiency. Wired Ethernet serves as the core channel for ''connecting'' devices and data. The FCU1501 Embedded Control Unit comes standard with two industrial Ethernet ports, supporting 10/100Mbps adaptive transmission. It can automatically align with the communication requirements of different devices, enabling simultaneous ''connection'' of multiple industrial devices while ensuring efficient data interconnection between equipment, cloud platforms, and control terminals—effectively reducing latency and packet loss.

Notably, the FCU1501 is designed with three‑level EMC protection, maintaining stable communication links even in high‑electromagnetic‑interference workshop environments. With its strong anti‑interference capability, it supports 24/7 stable communication between production‑line equipment and management platforms. Connection disruptions are effectively eliminated, significantly improving the reliability of production data collection and ensuring continuous and accurate data transmission.

Scenarios

Industrial Serial Ports Bridge Legacy and New Equipment for Seamless Integration

Many older industrial sites rely on legacy devices that lack Ethernet ports and can only communicate via serial interfaces. Enabling these ''legacy devices'' to interconnect with modern intelligent systems is a key challenge in digital transformation. The FCU1501 Embedded Control Unit offers differentiated serial port configurations: a base version with 4 RS485 ports and an expanded version with 8 RS485 ports, complemented by 2 multiplexed RS232 interfaces. These can directly connect to PLCs, smart meters, inverters, and other traditional industrial terminals without additional modification.

High-Speed CAN Bus Meets High Real‑Time Requirements for Massive Data Interconnection

For applications with strict demands on data transmission speed and stability—such as rail transportation and new energy storage—the FCU1501 provides CAN bus interfaces (supporting CAN‑FD and CAN 2.0B, with isolated digital ground per channel). Options include 1 CAN interface in the base version and 2 in the expanded version, natively supporting dual protocols for high‑speed interconnection of large‑scale data.

For example, in a new‑energy storage power station, the CAN interface successfully ''connects'' battery packs with the management platform, enabling real‑time collection of voltage, current, temperature, and other battery data. This achieves high‑speed interconnection between the Battery Management System (BMS) and the monitoring platform, ensuring real‑time data transmission and fast command response—fully meeting the demands of high‑real‑time scenarios and aligning with the development trends of the new energy storage industry.

Expand and Wirelessly Adapt to Diverse Scenarios, Achieve Massive Data Interconnection

Industrial environments are complex and varied. In areas where outdoor equipment is deployed or wiring is impractical, wired connections become difficult to implement—requiring flexible wireless ''connectivity'' capabilities. The FCU1501 Embedded Control Unit is equipped with one USB 2.0 port, allowing flexible connection of external devices such as USB drives. It also features dual-band Wi-Fi and Bluetooth 5.0 as standard, with an optional 4G module to supplement wireless ''connectivity,'' making it suitable for outdoor and wiring-challenged scenarios.

For example, in smart park renovations of older factories, some outdoor monitoring devices cannot be wired, making it difficult to transmit equipment data to the management platform. With the introduction of the FCU1501 Embedded Control Unit, wireless ''interconnection'' between outdoor monitoring devices and the park management platform is achieved—eliminating the need for wiring, enabling rapid intelligent integration of park equipment, and significantly improving park management efficiency.

Digital Control Bridges Sensing and Control

Efficient operation in industrial settings relies on a closed loop of ''sensing → acquisition → control.'' The FCU1501 is equipped with comprehensive DI/DO digital interfaces (2 DI/DO in the base version, 8 DI/DO in the expanded version), enabling precise ''connection'' of on-site sensors, audible/visual alarms, valve actuators, and other equipment. It facilitates real-time acquisition of equipment status signals and output of control commands, with millisecond-level response speeds ensuring rapid ''connectivity'' between sensing and actuating devices.

In smart municipal pipeline monitoring scenarios, real-time monitoring of pipeline pressure and flow is required, alongside automatic valve control based on the monitored data. The FCU1501 uses DI interfaces to ''connect'' pipeline sensors, collecting real-time data and transmitting it to the monitoring platform. Through DO interfaces, it then ''connects'' valve actuators, realizing a closed-loop ''interconnection'' of monitoring and control. This enables automatic adjustment of pipeline pressure and flow without manual intervention, significantly reducing municipal operation costs and enhancing the intelligence level of pipeline management.

Summary | Full-Stack Independent Architecture Enables Efficient Global Interconnection

The FCU1501 Embedded Control Unit, a new-generation, fully self-developed data gateway, consistently focuses on ''connectivity'' and ''interconnection'' in industrial scenarios. Leveraging comprehensive interface resources and flexible expansion capabilities, it adapts to applications across smart manufacturing, new energy, smart municipal, and other industries. By providing stable, cost-effective connectivity solutions, it supports enterprise digital transformation and empowers global businesses to achieve efficient, wide-area interconnection.

Adaptation Background and Platform Characteristic Analysis

Adaptation Background

Currently engaged in industrial display development on the RK3588 platform running Android 14 (kernel version 6.1.99). The work involves adapting the LT9211 MIPI-to-LVDS module to support a 1280×800 LVDS screen and a GT911 touchscreen. The primary goal is to ensure stable display power-on and normal touchscreen functionality.

Platform Characteristic Analysis Before Adaptation

The Android 14 BSP for the platform incorporates a standard DRM framework for its display architecture. The integration of the MIPI DSI bridge focuses on three crucial aspects: ensuring that the driver is correctly compiled into the kernel, configuring hardware resources in the device tree to avoid conflicts, and achieving complete compatibility between the display timing and screen parameters.

Before modifications, the layered rules of the kernel configuration in the compilation environment were verified: the kernel configuration for OK3588-Android 14 consists of three files: rockchip_defconfig (chip-level), -14.config (system-level), and OK3588-C-Android.config (board-level). All board-level custom configurations must be placed in the third file to prevent overwriting during future SDK upgrades. This version compatibility rule is mandatory for industrial-grade development.

Specific Implementation Steps for Adaptation

I. Driver Layer Deployment

1. LT9211 Driver File and Makefile Configuration

The LT9211 is a MIPI-to-LVDS bridge chip from Lontium, classified as a DRM bridge driver. It must be placed in the corresponding driver directory to be correctly recognized by the framework.

Copy the lt9211.c driver file to kernel-6.1/drivers/gpu/drm/bridge, and modify the Makefile in the same directory by adding the following compilation configuration at the end to ensure the driver is compiled into the kernel image:

Complete context reference:

Makefile
27 obj-$(CONFIG_DRM_SIMPLE_BRIDGE) += simple-bridge.o
28 obj-$(CONFIG_DRM_THINE_THC63LVD1024) += thc63lvd1024.o
29 obj-$(CONFIG_DRM_TOSHIBA_TC358762) += tc358762.o
30 obj-$(CONFIG_DRM_TOSHIBA_TC358764) += tc358764.o
31 obj-$(CONFIG_DRM_TOSHIBA_TC358767) += tc358767.o
32 obj-$(CONFIG_DRM_TOSHIBA_TC358768) += tc358768.o
33 obj-$(CONFIG_DRM_TOSHIBA_TC358775) += tc358775.o
34 obj-$(CONFIG_DRM_I2C_ADV7511) += adv7511/
35 obj-$(CONFIG_DRM_TI_DLPC3433) += ti-dlpc3433.o
36 obj-$(CONFIG_DRM_TI_SN65DSI83) += ti-sn65dsi83.o
37 obj-$(CONFIG_DRM_TI_SN65DSI86) += ti-sn65dsi86.o
38 obj-$(CONFIG_DRM_TI_TFP410) += ti-tfp410.o
39 obj-$(CONFIG_DRM_TI_TPD12S015) += ti-tpd12s015.o
40 obj-$(CONFIG_DRM_NWL_MIPI_DSI) += nwl-dsi.o
41 obj-$(CONFIG_DRM_ITE_IT66121) += ite-it66121.o
42 obj-y += lt8912b.o
43
44 obj-y += analogix/
45 obj-y += cadence/
46 obj-y += imx/
47 obj-y += lt9211.o

2. Kernel Configuration Modification

This adaptation is paired with a GT911 touchscreen, requiring the activation of the Goodix series touch driver in the kernel. Following the previously confirmed configuration layering rules, modify the board-level configuration file kernel-6.1/kernel/configs/OK3588-C-Android.config by adding the following:

Complete context reference:

Plain Text
CONFIG_TOUCHSCREEN_EDT_FT5X06=y
CONFIG_GPIO_PCA953X=y
CONFIG_GPIO_PCA953X_IRQ=y
CONFIG_SND_SOC_NAU8822=y
CONFIG_NET_VENDOR_INTEL=y
CONFIG_R8169=y
CONFIG_E1000E=y
CONFIG_RTC_DRV_PCF8563=y
CONFIG_RTC_DRV_RX8010=y
CONFIG_NXPWIFI=m
CONFIG_VIDEO_OV5645=y
CONFIG_USB_SERIAL_EXAR=y
CONFIG_TOUCHSCREEN_GOODIX=y

II. Device Tree Hardware Resource Configuration

The device tree modification path is kernel-6.1/arch/arm64/boot/dts/rockchip/OK3588-C-Common.dtsi. This adaptation uses the MIPI0 channel as an example. To facilitate future rollback and troubleshooting, all existing conflicting configurations are retained through commenting rather than direct deletion.

1. Addition of Touchscreen Node Definition

In the original device tree, the FT5x06 touchscreen node occupied pins required for the current GT911. The existing node was first commented out, and the GT911 interrupt and reset pin multiplexing configuration was added to prevent pin resource conflicts.

Plain Text
usb-typec {
usbc0_int: usbc0-int {
rockchip,pins = <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
};
typec5v_pwren0: typec5v-pwren0 {
rockchip,pins = <0 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
};
usbc1_int: usbc1-int {
rockchip,pins = <1 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>;
};
typec5v_pwren1: typec5v-pwren1 {
rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
tp_int {
gt911_dsi1_gpio: gt911-dsi0-gpio {
rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>,
<3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
/* Original ft5x06 node comment to avoid pin conflict */
/*
ft5x06_dsi0_gpio: ft5x06-dsi0-gpio {
rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>,
<3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
};
*/
ft5x06_dsi1_gpio: ft5x06-dsi1-gpio {
rockchip,pins = <3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>,
<3 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
};
headphone {
hp_det: hp-det {
rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};

2. Adding Device Configuration under the I2C2 Node

Both the LT9211 and GT911 are connected to the I2C2 bus. New device node configurations are added under the &i2c2 node, while the conflicting original ft5x06 device node is commented out.

Plain Text
extio: tca6424@23 {
compatible = "ti,tca6424";
reg =;
interrupt-parent = <&gpio1>;
interrupts =;
gpio-controller;
#gpio-cells =;
interrupt-controller;
#interrupt-cells =;
pinctrl-0 = <&extio_int_gpio>;
pinctrl-names = "default";
status = "okay";
};
/* Comment out the original ft5x06 node, kept for reference */
/*
ft5x06_dsi0: ft5x06@38 {
compatible = "edt,edt-ft5406", "edt,edt-ft5x06";
reg =;
pinctrl-names = "ft5x06_default";
pinctrl-0 = <&ft5x06_dsi0_gpio>;
interrupt-parent = <&gpio3>;
interrupts =;
// irq-gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>;
// reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_HIGH>;
touchscreen-size-x =;
touchscreen-size-y =;
input-phy = "ft5x06 2 38/input0";
status = "okay";
}
*/
usbc0: fusb302@22 {
compatible = "fcs,fusb302";
reg =;
interrupt-parent = <&gpio1>;
interrupts =;
pinctrl-names = "default";
pinctrl-0 = <&usbc0_int>;
vbus-supply = <&vbus5v_typec>;
status = "okay";
};
/* LT9211 MIPI-to-LVDS bridge chip device node */
lt9211: lt9211@2d {
compatible = "lontium,lt9211";
reg =;
// reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_HIGH>;
status = "okay";
};
/* GT911 touchscreen device node */
gt911_14: gt911_14_ts@14 {
compatible = "goodix,gt911";
reg =;
pinctrl-names = "default";
pinctrl-0 = <>911_dsi1_gpio>;
interrupt-parent = <&gpio3>;
interrupts =;
irq-gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>;
// reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_HIGH>;
touchscreen-size-x =;
touchscreen-size-y =;
// touchscreen-inverted-x;
// touchscreen-inverted-y;
touchscreen-swapped-x-y;
status = "okay";
};
};

3. Modifying Screen Parameters in the DSI Node

Replace the original 1024×600 timing configuration in the &dsi0 node with timing parameters adapted for the 1280×800 resolution LVDS screen. All parameters must strictly correspond to the screen’s specification sheet to prevent black screens or screen corruption issues.

Plain Text
/* Comment out the original 1024×600 timing configuration, kept for reference */
/*
disp_timings0: display-timings {
native-mode = <&dsi0_timing0>;
dsi0_timing0: timing0 {
hback-porch =;
hfront-porch =;
hactive =;
hsync-len =;
vback-porch =;
vfront-porch =;
vactive =;
vsync-len =;
clock-frequency =;
vsync-active =;
hsync-active =;
de-active =;
pixelclk-active =;
};
};
*/
/* Add timing configuration for the 1280×800 LVDS display */
disp_timings0: display-timings {
native-mode = <&dsi0_timing0>;
dsi0_timing0: timing0 {
hback-porch =;
hfront-porch =;
hactive =;
hsync-len =;
vback-porch =;
vfront-porch =;
vactive =;
vsync-len =;
clock-frequency =;
vsync-active =;
hsync-active =;
de-active =;
pixelclk-active =;
};
};

III. Kernel Compilation and Flashing

To improve validation efficiency, there is no need to compile the entire Android system. The kernel can be compiled separately using commands. After compilation, the generated boot.img image is located in the rockdev/Image-ok3588_c/ directory. Flashing only this image completes the adaptation.

Bash
# Navigate to the SDK root directory
cd /home/forlinx/work/OK3588-android14-source/
# Load the build environment, select the corresponding product branch
source build/envsetup.sh;lunch ok3588_c-userdebug
# Compile the kernel separately and generate the boot image
./build.sh -Ku

Verification and Experience Summary

After the modifications and compilation according to the above steps, the generated boot.img is flashed onto the embedded RK3588 development board. Upon power-up, the 1280×800 resolution LVDS screen lights up normally, the Android 14 system desktop displays completely, the GT911 touchscreen responds correctly without drift or missed touches, and a continuous 72-hour power-on test shows no display abnormalities.

The main focus of this adaptation is to align with the DRM display framework for high-version Android on the Rockchip platform. It is crucial to strictly follow the SDK's layered configuration rules. This means that board-level custom configurations must not override chip-level or system-level configuration files, which is important for ensuring future SDK upgrades and maintaining long-term compatibility.

Additionally, adapting the MIPI-to-LVDS bridge requires a comprehensive approach that encompasses three key areas: the driver, the device tree, and timing. Any deviation in these parameters can lead to display issues. In industrial-grade product development, achieving a display is not the ultimate goal. The fundamental principles of embedded development include preserving complete reference configurations, ensuring version compatibility, and guaranteeing long-term stability.

1. Industry Demands and Development Challenges

Maintaining a process keep-alive is essential in Android application development for ARM platforms. This is especially true in industrial-grade embedded scenarios, where the continuous and stable operation of background applications is crucial for tasks like device monitoring and data acquisition. So, during recent Android 14 development on the Forlinx Embedded RK3576 development board, the focus has been on addressing the need for industrial monitoring applications to maintain continuous background operation under native system management policies. Several key technical challenges have been identified in this process：

• System-Level Cleanup Mechanisms:

OOM Killer and Low Memory Killer proactively clear background processes. The system automatically terminates low-priority processes based on memory usage.

• User-Action Triggered Termination:

Actions such as screen-off, process freezing, manually swiping away the app interface, or executing kill commands via the shell terminal can directly terminate processes.

• Inherent System Limitations:

The system lacks native keep-alive or auto-restart mechanisms, preventing terminated processes from recovering automatically.

• Severe Impact on Operations:

This leads to interruptions in data acquisition, device monitoring failures, and severely compromises the stability of the entire industrial system.

Therefore, there is an urgent need to develop a targeted solution for process keep-alive and automatic restart, ensuring the continuous and stable operation of core business processes in industrial environments.

2. System Characteristics and Core Solution Approach

An analysis of the RK3576 development board running the Android 14 system reveals that it adheres to strict policies for managing background processes. The system actively removes low-priority background processes based on memory usage and supports functions such as freezing processes and enforcing terminations.

In the native setup, there are no dedicated mechanisms to protect specific processes from being terminated, nor is there built-in logic to restart processes automatically after they have been stopped. This limitation does not meet the stability requirements for background applications in industrial scenarios.

Core Solution Approach: A customized system service is proposed to create a whitelist for processes that require keep-alive functionality. Processes on this whitelist can bypass the restrictions imposed by the system's memory management and process freezing mechanisms. Additionally, a separate monitoring thread is developed to continuously track the operational status of whitelisted processes. If a process is terminated—whether manually or by the system—this thread will trigger an automatic restart.

3. Development Basis and Overall Framework

During the development process, it was noted that the Android 14 system source code included with the Forlinx RK3576 development board already features a foundational "whitelist" keep-alive mechanism. This significantly reduces the need for tedious low-level adaptation work. Building on this existing foundation, a comprehensive APP keep-alive solution has been further refined and implemented.

Forlinx RK3576 Development Board

The core carrier of the solution is the whitelist system service WhiteAppProcessListManagerService, whose specific path is:

frameworks/base/services/core/java/com/android/server/whiteappprocesslist/WhiteAppProcessListManagerService.java

The entire keep-alive solution is logically clear and highly implementable, primarily divided into the following three core steps:

• Whitelist Control Interface Development

Encapsulates the functions for retrieving and adding processes to the whitelist, enabling the management of process protection.

• Monitoring Service Development

An independent monitoring thread is developed to track the real-time status of whitelisted processes and implement automatic process restart.

• Testing and Validation

A test application is developed and subjected to comprehensive scenario validation to ensure the stability and reliability of the keep-alive mechanism.

4. Whitelist Management Interface Development and Initialization Configuration

As the system service managing the whitelist, WhiteAppProcessListManagerService encapsulates two core external interfaces, which respectively implement the retrieval and addition of whitelist entries:

4.1 Implementation of SoM Interfaces

//Get the whitelist process list interface
@Override
public @Nullable List<String> getWhiteAppProcessList() {
try{
// Call the corresponding method of the Activity Manager Service to obtain the whitelist
return mActivityManagerService.getWhiteAppProcessList();
}catch(Exception e){
e.printStackTrace();
return null;
}
}
//Add Process Name to Whitelist Interface
@Override
public void setWhiteAppProcessList(@Nullable String whiteAppProcess){
try{
// Call the corresponding method of the Activity Manager Service to set the whitelist
mActivityManagerService.setWhiteAppProcessList(whiteAppProcess);
}catch(Exception e){
e.printStackTrace();
}
}

4.2 Service Initialization Configuration

In the constructor of this service, the Forlinx RK3576 development board preconfigures the test application com.forlinx.logtest and adds this test app to the whitelist as the validation carrier for the keep-alive mechanism. At the same time, the monitoring thread is launched to ensure the proper triggering of keep-alive logic:

public WhiteAppProcessListManagerService(Context context, ActivityManagerService activitymanagerservice) {
mContext= context;
mActivityManagerService = activitymanagerservice;
//Add the test APP to the white list, and there is no extra space in the package name
mActivityManagerService.setWhiteAppProcessList("com.forlinx.logtest");
//Get the whitelist and print the log for debugging verification
List<String> list = mActivityManagerService.getWhiteAppProcessList();
for (int i=0;i<list.size();i++){
Log.d(TAG,"white app process list["+i+"]-"+list.get(i));
}
// Start the whitelist monitoring thread and start the process status detection
Thread thread = new Thread(new WhiteListMonitor(mContext,this));
thread.start();
}

Note: The whitelist monitoring service operates at the system level, starts automatically on system boot, and runs independently without relying on the test app launch. Only processes within the whitelist require manual initial startup, after which the monitoring service will continuously track the status.

5. Development of Whitelist Process Monitoring and Auto-Restart Service

The monitoring service and the framework-level whitelist mechanism have distinct roles:

Framework-Level Whitelist Mechanism:

Already adapted within the framework-level process management module, it allows processes in the whitelist to bypass system-level process cleanup and freezing restrictions, such as those imposed by OOM Killer, Low Memory Killer, Freeze (process freezing), and the ''Force Stop'' button in Android Settings.

Monitoring Service:

As an independent thread, it primarily handles scenarios where processes are terminated manually, such as when the application interface is closed or the process is killed via shell commands.

5.1 Core Logic of the Monitoring Thread

The monitoring service performs real-time traversal detection at 1-second intervals. When an abnormal status is detected for a whitelisted process, it automatically restarts the process and switches it to the background:

@Override
public void run(){
while(true){
try{
//Get all the process information of the system
List<ActivityManager.RunningAppProcessInfo> processes = getRunningAppProcesses();
for (ActivityManager.RunningAppProcessInfo process : processes){
//Print basic process information for debugging
Log.d(TAG,"Process:"+process.processName+",PID:"+process.pid+",state:"+process.processStateToString(process.processState)+","+process.processState);
//Detect whether the process is a whitelist process and the status is equal to or greater than empty cache status.
if (mWhiteProcessList.contains(process.processName) && process.processState >= ActivityManager.PROCESS_STATE_CACHED_EMPTY){
//Build the startup Intent based on the process name
Intent intent = getLaunchIntentForPackage(process.processName);
if (intent != null){
Log.d(TAG,"restart"+process.processName);
//Add a flag bit to avoid creating a new task stack
intent.addFlags(Intent.FLAG_ACTIVITY_NEW_TASK);
//Carry the startup mode ID and mark it as background active.
intent.putExtra("StartMode","Background");
//Start the process and complete the automatic pulling.
mContext.startActivity(intent);
//Simulate the HOme key after activation, and switch the application to the background.
Instrumentation instrumentation = new Instrumentation();
instrumentation.sendKeyDownUpSync(KeyEvent.KEYCODE_HOME);
}
}
}
//The thread sleeps for 1s, and the process status is detected in a loop to ensure the timeliness of pulling activity.
Thread.sleep(1000);
} catch(Exception e){
Log.d(TAG,"restart process fail");
e.printStackTrace();
}
}
}

The monitoring thread can quickly identify and complete the restart process when an abnormal status occurs in a whitelisted process. The transmission of Intent parameters provides a key basis for the application to distinguish the startup method and execute background operation logic. The operation of switching to the background after restart ensures the concealment and stability of application background operation in industrial scenarios.

6. Test APP Adaptation Development and Full-Scenario Validation

To verify the effectiveness and stability of the keep-alive mechanism, this test conducts adaptation development and full-scenario validation based on the com.forlinx.logtest test APP. This APP completes the development of startup mode judgment and background operation logic, and includes its own test thread.

6.1 Development of Startup Method Recognition Logic

The test APP receives the StartMode message transmitted by the monitoring service in the onCreate function. By determining whether the message content is ''Background,'' it accurately identifies whether the application's startup method is triggered by the monitoring service's restart or manually triggered by the user:

// Determine if the application was started by background restart
private boolean isAppIsInBackground() {
boolean isInBackground = false;
String StartMode = getIntent().getStringExtra("StartMode");
if(StartMode != null && StartMode.equals("Background")) {
isInBackground = true;
}
return isInBackground;
}
@Override
protected void onCreate(Bundle savedInstanceState){
super.onCreate(savedInstanceState);
setContentView(R.layout.activity_main);
//Execute the corresponding logic according to the startup mode
if(isAppIsInBackground()){
Log.d(TAG, "start in the background");
moveTaskToBack(true);
}else{
Log.d(TAG, "The user triggers the start");
}
}

6.2 Development of Background Operation Verification Thread

The test APP includes a built-in test thread that prints an incremental number at 1-second intervals. Developers can observe real-time number changes through logcat logs, providing a clear and intuitive way to confirm whether the APP is running stably and continuously in the background:

new Thread(() -> {
long num = 0;
while (true) {
num++;
Log.d(TAG, "logtest count " + num);
try {
Thread.sleep(1000);
} catch (InterruptedException e) {
throw new RuntimeException(e);
}
}
}).start();

6.3 Full-Scenario Validation Results

After completing the adaptation development, the author conducted full-scenario validation on the Forlinx OK3576-C Android 14 platform. After launching the com.forlinx.logtest test APP, the following operations were performed sequentially: screen off, manual closing of the application interface, executing kill commands via the shell terminal, and triggering OOM Killer due to low system memory. Observations via logcat logs revealed:

• After a process was manually terminated or cleared by the system, the monitoring service completed the automatic restart within 1 second. After restart, the APP automatically resumed running in the background without displaying any foreground interface;

• The incremental numbers from the test thread continued printing without any interruption, confirming the APP stable background operation;

• Processes within the whitelist were not cleared by OOM Killer, Low Memory Killer, or the process freezing mechanism, fully bypassing the limitations of the system's background process management;

The full-scenario validation results demonstrate that the developed keep-alive solution meets the core requirements of continuous and stable background operation for APPs in industrial-grade embedded scenarios, with effective and reliable keep-alive and restart logic.

7. Reflections and Insights on Scenario Adaptation

Implementing the APP keep-alive function on the Forlinx OK3576-C (RK3576) platform running Android 14 has provided developers with a deeper understanding of system service customization for embedded Android platforms. There is a fundamental difference between embedded platforms and consumer-grade Android devices:

Key differences between embedded platforms and consumer-grade Android devices:

• Industrial Requirements: Higher demands for stability and continuity of background processes compared to consumer scenarios; core operations must not be interrupted.

• Native System Limitations: Android's process management mechanism prioritizes resource optimization, which cannot fully meet the specific needs of industrial scenarios.

• Core Solution: Custom development of an independent, system-level keep-alive monitoring service through low-level system services.

• Design Advantages: The monitoring service starts automatically on boot, is decoupled from application processes, and ensures stability of the monitoring logic.

8. Areas for Optimization and Functional Expansion Suggestions

While the current keep-alive solution generally meets the core needs of industrial scenarios, there is one area that requires optimization. Specifically, processes that are included in the whitelist do not start automatically upon boot. Developers need to manually launch the test application for the first time before the monitoring service begins status detection and restart operations.

To enable automatic startup for whitelisted processes at boot, the constructor of the WhiteAppProcessListManagerService could be modified to directly launch these processes via an Intent, similar to the method used by the monitoring service to start processes. This change would create a fully automated workflow of "start on boot, restart on exception."

Expansion Suggestion: If there is a need for flexible control over the whitelist at the application layer—such as dynamically adding or removing keep-alive processes—the management class for the whitelist system service could be packaged as a JAR interface to facilitate external calling capabilities. However, from a system stability perspective, this modification is not recommended. Industrial-grade embedded devices have extremely high demands for system stability, and dynamic modifications to the whitelist could introduce risks, such as process management issues and excessive consumption of system resources.

9. Summary

The Core Value of Embedded Development

Embedded development focuses on tailoring systems and hardware to meet specific business needs. This APP keep-alive solution is a customized adaptation of Android process management system, designed to fulfill the critical requirement of maintaining continuous background processes for device monitoring and data collection in industrial scenarios.

In embedded development, native systems often offer only generalized functions and mechanisms, which may not fully address the unique and specific requirements of different industries. As a result, developers need to have a deep understanding of both the hardware platform and low-level system logic. This knowledge enables them to engage in customized development that effectively tackles real-world business challenges.

Forlinx Embedded has officially launched the FAI-ARA240-M, an M.2-based AI accelerator built around the NXP Ara240 processor. The module provides a discrete NPU for offloading inference workloads from embedded host systems.

The Ara240 processor was first seen during the launch of the OK-MX9596-C. Forlinx provides additional details with this module, which delivers up to 40 TOPS of AI performance and supports a range of model types, including convolutional neural networks, transformer-based models, and multimodal architectures.

The accelerator is available with 8GB or 16GB of LPDDR4 memory for handling larger models and high-throughput workloads.

The module adopts a standard M.2 2280 form factor with an M-Key interface, allowing integration into existing platforms through PCIe without requiring changes to the base hardware.

FAI-ARA240-M dimensions

It supports PCIe Gen4 x4 and USB 3.2 Gen1 interfaces for data transfer between the host processor and the accelerator.

In this configuration, the FAI-ARA240-M operates as a co-processor, where the host system manages control and application logic while the accelerator handles AI inference tasks.

FAI-ARA240-M cooling system

The module is compatible with host platforms such as those based on NXP i.MX8M Plus and i.MX95 processors.

Software support includes compatibility with TensorFlow, PyTorch, and ONNX, along with development tools for model deployment, quantization, and optimization. The platform supports multiple data types, including INT4, INT8, and mixed-precision formats.

FAI-ARA240-M

The design includes secure boot and root-of-trust features, along with a thermal solution intended to maintain stable operation under sustained workloads.

Forlinx states that the module is specified for continuous operation and has undergone environmental validation for industrial use.

Specifications listed for the FAI-ARA240-M include:

• Processor:

  NXP Ara-240 Edge AI processor

• AI Performance:

  Up to 40 TOPS

• Memory:

  8GB / 16GB LPDDR4

• Form Factor:

  M.2 2280 (M-Key)

• Interface:

  PCIe Gen4 x4

  USB 3.2 Gen1

• Mechanical:

  80 x 22mm

Further Information

The FAI-ARA240-M is currently available for order. Please contact our sales team for the latest pricing.

Copyright Notice:

This article is reposted from LinuxGizmos. The original content is intended for industry information sharing and product news purposes. All copyrights and intellectual property belong to the original author and the platform LinuxGizmos. Forlinx Embedded respects the original work and has included the source for reference.

Recently, development on the OK1126B-S board based on the Rockchip RV1126 required adaptation of the Lontium LT8912B for MIPI-to-HDMI conversion. This is a common requirement in embedded display expansion, mainly involving driver porting, device tree configuration, and display parameter tuning. With its industrial-grade design, clear directory structure, and reliable hardware, the OK1126B-S provides an efficient development platform and simplifies third-party peripheral integration.

LT8912B MIPI-to-HDMI Adaptation Test Scenario on the OK1126B-S Development Board

After completing the basic configuration according to the standard adaptation process, the screen remained blank, and the HDMI output reported: ''Cannot display this video mode. Please reset the computer to 1920×1080.'' This prompted targeted troubleshooting and adaptation optimization.

Issue Analysis:

The HDMI output indicated that the video mode was incompatible. In MIPI-to-HDMI adaptation, such issues are often caused by a mismatch between the display modes supported by the driver and the resolution or timing parameters configured in the device tree. On the RV1126 platform, based on the DRM display framework, the driver layer provides display mode support, while the device tree defines the specific display timing and resolution. These two layers must match exactly for successful display initialization.

Based on this, the completed adaptation steps were first reviewed to confirm that driver deployment and device tree hardware binding were configured correctly. The focus was then narrowed to display mode matching, and the root cause was identified: in the LT8912B driver file lt8912_cp.c, only the 1280 × 800 display mode was enabled by default, while the initial device tree configuration was set to 1920 × 1080. As a result, the driver could not recognize or initialize the corresponding display mode, leading to the blank screen and HDMI compatibility issue.

Complete Adaptation Solution

To address the issue above, a complete adaptation solution was developed based on the characteristics of the OK1126B-S development board running the 6.1.141 Buildroot system. The process was carried out step by step, covering driver deployment, build configuration, device tree hardware binding, and display parameter matching. The specific steps are as follows:

1. Deploy the LT8912B Driver File

Place the Lontium LT8912B driver file lt8912_cp.c into the OK1126B-linux-source/kernel/drivers/gpu/drm/bridge/ directory of the Forlinx embedded development board source tree. This directory is the standard location for bridge chip drivers in the platform DRM display framework and also conforms to the driver directory structure of the Rockchip RV1126 kernel.

Note: The lt8912_cp.c file can be obtained by contacting online customer support.

2. Modify the Makefile to include the driver compilation.

After deploying the driver file, edit the Makefile in the kernel/drivers/gpu/drm/bridge/ directory. Add the following build instruction at the end of the file so that lt8912_cp.c is included in the kernel build process and the corresponding driver module is generated during kernel compilation:

obj-y += lt8912_cp.o

3. Add the LT8912B Hardware Node to the Device Tree

After resolving the driver build configuration, the next step is device tree configuration. Referring to the OK1126B-S-common.dtsi device tree file of the OK1126B-S platform, add the LT8912B device node under the i2c3 node to complete the hardware binding and attachment of the chip to the i2c3 bus. Since the LT8912B has three I2C addresses, address 0x01 is temporarily configured in the device tree. The core I2C addresses are added dynamically by the kernel driver functions. The node configuration is as follows:

&i2c3{
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c3m1_pins>;
// Lontium LT8912B MIPI-to-HDMI device node
lt8912: lt8912@1 {
compatible = "lontium,lt8912";
reg = <0x01>;
i2c-bus = <&i2c3>;
reset-gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_LOW>;
status = "okay";
};
};

Device Tree i2c3 Node Configuration Example

4. Modify the Display Device Tree to Match the Driver-Supported Display Mode

The previous black screen issue was mainly caused by a resolution mismatch. Edit the OK1126B-S-display.dtsi device tree file and change the display timing configuration to 1280 × 800, so that it matches the default display mode supported by the lt8912_cp.c driver. The specific display timing parameters are as follows:

disp_timings0: display-timings {
native-mode = <&panel_1280x800>;
panel_1280x800: timing0 {
hback-porch = <10>;
hfront-porch = <100>;
hactive = <1280>;
hsync-len = <10>;
vback-porch = <1>;
vfront-porch = <2>;
vactive = <800>;
vsync-len = <20>;
clock-frequency = <71000000>;
/* Approximate 71 MHz for ~60Hz with these timings */
vsync-active = <0>;
hsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};

Display Timing Parameter Configuration Example

5. Rebuild the Kernel to Complete the Adaptation

After modifying all the files above, run the kernel build command in the Buildroot environment of the RV1126 development board to compile the driver and device tree changes into the kernel image. Once the build is complete, flash the new kernel to the development board. At this point, the MIPI-to-HDMI adaptation is fully completed.

Verification Results

After powering on the RV1126B development board, the LT8912B MIPI-to-HDMI function was successfully adapted, the display lit up normally, and the previous video mode error no longer appeared. The adaptation results were further verified through terminal commands on the development board, and all feedback matched expectations:

1. Running i2cdetect -y 3 detected the LT8912B device on the i2c3 bus, confirming successful hardware attachment.

2. Running dmesg | grep 8912 showed normal driver initialization logs. The key log messages are as follows:

[4.964730] LT8912 ID:12,b2
[4.964736] LT8912:Start Initialization...
[5.222233] LT8912:Setting Mode 1280x800
[5.705876] LT8912:Releasing Reset (0xFF)...
[5.806216] LT8912: Enabling HDMI...
[5.806543] LT8912:Init Done.

Driver Initialization Log Verification Screenshot

Technical Summary

The successful adaptation of the LT8912B MIPI-to-HDMI function on the OK1126B-S platform once again confirms a core principle of embedded low-level development: the driver and device tree must match exactly. This is especially critical for display bridge chips, where the display modes supported by the driver and the timing parameters configured in the device tree are key to achieving proper display output.

During peripheral adaptation on embedded platforms, if the hardware has been successfully attached but the function still does not work properly, the most efficient troubleshooting approach is to first check the consistency between the driver and device tree parameters. Particular attention should be paid to resolution, display timing, configuration settings, and bus parameters.

The Forlinx OK1126B-S development board, with its standardized directory structure and stable, reliable hardware design, greatly simplified this adaptation work and serves as an ideal platform for embedded developers.

When integrating third-party bridge chips, careful review of the vendor driver’s default configuration is essential, as some drivers enable only limited functional modes by default. In such cases, priority should be given to adapting the device tree or driver configuration instead of directly modifying the driver source code, which helps improve efficiency and reduce the risk of introducing new stability issues.

The Forlinx OK1126B-S development board, with its standardized directory structure and stable, reliable hardware design, greatly simplified this adaptation work and serves as an ideal platform for embedded developers.

1. Overview

In embedded Linux product development, Java continues to be valuable alongside traditional C and C++ methods. It is particularly useful for cross-platform applications, utility programs, and certain higher-level business scenarios. For developers aiming to deploy the Java Runtime Environment (JDK) on ARM platforms, it is essential to complete the installation of the JDK, configure environment variables, and validate program runtime. This process is a crucial step in assessing the usability of platform.

This article demonstrates how to deploy the Java Development Kit (JDK) on a Linux 6.1.36 system using the Forlinx embedded OKMX93xx series development board as a reference. It includes basic validation steps and more complex test cases to ensure that the Java Runtime Environment is functioning correctly. This guide is suitable for evaluating development environments, setting up systems, and porting applications. While other platforms can use this method as a reference, adjustments may be required based on their specific software environments.

2. Application Scope

This guide is specifically intended for the Forlinx OKMX93xx series platform operating on the Linux 6.1.36 operating system. Please note that variations in system configuration, directory structure, and software environment may exist across different platforms. Therefore, adjust the steps in this guide to fit your specific setups.

3. JDK Support

The installation and test packages used in this guide include:

jdk-8u381-linux-aarch64.tar.gz

jdk-8-linux-aarch64-demos.tar.gz

Among these, jdk-8u381-linux-aarch64.tar.gz is used for deploying the JDK runtime environment, while jdk-8-linux-aarch64-demos.tar.gz is used for further testing with example programs. According to the original documentation, these two compressed packages can be obtained from the JDK download page provided by Oracle.

http://www.oracle.com/technetwork/java/javase/downloads/jdk8-downloads-2133151.html

4. JDK Deployment Steps

4.1 Installation Packages Preparation

First, prepare the two compressed packages:
jdk-8u381-linux-aarch64.tar.gz (used for JDK installation)
jdk-8-linux-aarch64-demos.tar.gz (used for demo program testing).

4.2 Installation Package Transfer to the Development Board

Copy the jdk-8u381-linux-aarch64.tar.gz package to the development board, for example, to the /home/root/ directory.

4.3 Extraction of the JDK Installation Package

In the terminal on the development board, execute the following commands:

root@ok-mx93:~# tar -xvf jdk-8u381-linux-aarch64.tar.gz
root@ok-mx93:~# ls

After extraction, the jdk1.8.0_381 folder will be created. This directory is the path that will correspond to the JAVA_HOME environment variable later.

4.4 Environment Variables Configuration

Append the following content to the end of the /etc/profile file:

JAVA_HOME=/home/root/jdk1.8.0_381
CLASSPATH=.:$JAVA_HOME/jre/lib/rt.jar:$JAVA_HOME/lib/dt.jar:$JAVA_HOME/lib/tools.jar
PATH=$JAVA_HOME/bin:$PATH
export JAVA_HOME CLASSPATH PATH

JAVA_HOME specifies the JDK installation directory.
CLASSPATH specifies the Java runtime class library path.
PATH adds Java commands like java and javac to the system's environment variables for easy access.

4.5 Configuration Application

After configuring, execute the following command to make the environment variables effective immediately:

source /etc/profile

If this command is not executed, the newly added Java environment variables may not be recognized in the current terminal session.

4.6 JDK Version Check

Run the following command to verify if the JDK is installed successfully:

java -version

If the system can output the version information, it means the JDK installation and environment variable configuration are successful.

5. Basic Functionality Verification

Copy the test program to the current directory.

Then, execute the test program for verification:

The result is correct.

6. Advanced Program Testing

Once the basic verification is successful, the document further tests the Java environment using the example programs provided in jdk-8-linux-aarch64-demos.tar.gz. After extracting the package, a jdk1.8.0_341 directory is created, which contains two folders: sample and demo, for further Java environment verification.

6.1 Navigation to the Test Directory

Enter the directory:

root@ok-mx93:~# cd jdk1.8.0_341/sample/forkjoin/mergesort/

There are test files such as MergeDemo.java and MergeSort.java.

6.2 Test Program Compilation

Run the following command to compile the program:

root@ok-mx93:~/jdk1.8.0_341/sample/forkjoin/mergesort$ javac MergeDemo.java

After compiling, the following .class files will be generated in the directory:

MergeDemo$1.class
MergeDemo.java
MergeDemo$Configuration.class
MergeSort$MergeSortTask.class
MergeDemo$Range.class
MergeSort.class
MergeDemo.class
MergeSort.java

The results show that the javac compiler is operating correctly on the target platform, and the Java source code has been accurately converted into the corresponding bytecode files.

6.3 Test Program Execution

Execute the following command to run the example program:

root@ok-mx93:~/jdk1.8.0_341/sample/forkjoin/mergesort$ java MergeDemo

The program outputs as follows:

Default configuration. Running with parameters: 20000 20000 10 2 2 10
Time in milliseconds. Y-axis: number of elements. X-axis parallelism used.
2 4 6 8 10 12 14 16 18 20
20000: 7 8 9 5 7 8 6 7 6 5
40000: 9 9 11 11 11 12 11 10 13 14
60000: 13 14 15 15 14 16 16 17 16 15
80000: 19 20 21 21 22 23 22 21 22 23
100000: 24 25 26 25 28 26 28 27 28 26
120000: 28 29 31 31 31 31 36 33 32 31
140000: 34 35 40 35 38 42 38 42 37 38
160000: 53 58 54 57 57 56 45 46 46 47
180000: 61 61 61 64 63 65 63 60 62 52
200000: 68 65 65 66 68 73 73 69 75 67
Total: 316 324 333 330 339 352 338 332 337 318

The validation process outlined above indicates that the OKMX93xx platform has successfully completed the installation of the JDK, configured the environment variables, compiled Java source code, and executed a demo program. This means that the platform not only supports the Java Runtime Environment but also offers fundamental capabilities for Java development and verification. This makes it a valuable resource for future application porting and project evaluation.

7. Summary

By following the steps outlined in this guide, you can successfully complete JDK 8 deployment, configure environment variables, and test demo programs on the OKMX93xx Linux 6.1.36 system. This platform provides a clear and reproducible path for developers who are working on porting Java applications, validating functionality, or conducting preliminary technical assessments on ARM platforms. Therefore, the OKMX93xx serves as an important reference for future project

In the development of industrial HMI, including smart terminals, self-service kiosks, and embedded display systems, integrating display screens with touch input is a crucial engineering task. During fast-paced project cycles, developers often need to adapt and troubleshoot display modules of different sizes, interfaces, and touch controllers, depending on the specific hardware configurations.

1. Background

This guide offers a clear, step-by-step process for integrating a 15.6-inch Dual-LVDS display panel with an ILI2510 touch controller on the Forlinx Embedded OK6254-C SBC, operating on the Linux 6.1.33 kernel.

2. Display Configuration

2.1 Display

Modify the forlinx _ contorl node in/OK62xx-linux-kernel/arch/arm64/boot/DTS/Ti/OK62xx.dtsi as shown in the figure below:

2.2 Touchscreen

2.2.1 Adding the Device Tree Node

Refer to the schematic based on the hardware connection at P34 to confirm that the hardware is connected via I2C2.

Consult the chip manual to check its multiplexing functionality (since the default I2C2 interface is already configured, no modifications are necessary).

Perform the multiplexing in /OK62xx-linux-kernel/arch/arm64/boot/dts/ti/OK62xx.dtsi:

Comment out the original interface.

Add it to the usr_led_pins_default node and modify it as shown in the diagram.

AM62X_IOPAD(0x0e0, PIN_INPUT, 7) /* (V20) VOUT0_DATA10 /
AM62X_IOPAD(0x0e4, PIN_OUTPUT, 7) / (AA23) VOUT0_DATA11 */

Add a new node under the main_i2c2 node:

touchscreen: ilitek_251x@41 {
compatible = "ilitek,ili251x";
reg = <0x41>;
pinctrl-0 = <&usr_led_pins_default>;
interrupt-parent = <&main_gpio0>;
interrupts = <55 IRQ_TYPE_EDGE_FALLING>;
reset-gpios = <&main_gpio0 56 GPIO_ACTIVE_LOW>;
wakeup-source;
status = "okay";
};

2.2.2 Loading the Kernel Driver

Enter Ok62xx-linux-kernel to configure menuconfig.

forlinx@ubuntu:~/62xx/OK62xx-linux-sdk$ cd OK62xx-linux-kernel/
forlinx@ubuntu:~/62xx/OK62xx-linux-sdk/OK62xx-linux-kernel$ make menuconfig ARCH=arm64

Load the driver under Device Drivers > Input device support > Touchscreens, selecting the driver in the red box.

Recompile the kernel and place the compiled Image and OK6254-C.dtb files in the /boot directory. Save and restart the development board. During the Uboot phase, select the screen configuration as follows:

2.2.3 Calibrating the Screen and Configuring Rules

1. View the node

card0-LVDS-1 corresponds to lvds1.

2. Set udev

root@OK62xx:/# vi /etc/udev/rules.d/touchscreen.rules
SUBSYSTEM=="input", ACTION=="change|add", ATTRS{name}=="ili210x_i2c", ENV{WL_OUTPUT}="LVDS-1"

Enter the following command to configure udev rules:

3. Use the command vi /etc/xdg/weston/weston.ini to open the screen calibration file and uncomment it. To enable the screen calibration tool.

root@OK62xx:/# vi /etc/xdg/weston/weston.ini

If the file does not exist, add the following content at the end:

[libinput]
touchscreen_calibrator=true

4. Screen Calibration

root@OK62xx:/# weston-touch-calibrator "LVDS-1" --debug -v

After entering the command, touch the red crosses on the screen in sequence to obtain the calibration values.

5. Configure the environment variable

root@OK62xx:/# vi /etc/udev/rules.d/ws-calibrate.rules

Delete the original content and add the following:

SUBSYSTEM=="input", ATTRS{name}=="ili210x_i2c", ENV{LIBINPUT_CALIBRATION_MATRIX}="1.014184 -0.032956 -0.007435 -0.008599 1.035186 0.004496", ENV{ID_INPUT_KEY}="1"

Save and reboot the device.

In the development of embedded display terminals, adapting touchscreens might seem like a minor feature, but it has a significant impact on the overall human-machine interaction experience. For developers who require screen customization, interface expansion, and project implementation, mastering the entire touchscreen adaptation process can greatly enhance product development efficiency and improve troubleshooting capabilities.

The Forlinx Embedded platform offers a reliable hardware foundation along with a comprehensive software development environment. This aids developers in efficiently integrating systems, from low-level drivers to high-level applications. If you are involved in the development of displays, HMI, or industrial terminal products, this article could be a valuable reference for adapting your project.

The rapid evolution of Large Language Models (LLMs) and Multimodal AI is pushing the limits of traditional edge computing. To address the growing demand for high-performance AI inference without the complexity of a full system redesign, Forlinx Embedded, a proud NXP Gold Partner, is excited to announce the global launch of the FAI-ARA240-M Edge AI Accelerator.

The Challenge: Scaling AI Performance at the Edge

As AI workloads move from simple object detection to complex Generative AI—such as Vision-Language Models (VLMs) and Vision-Language-Action (VLA) models—developers face a significant hurdle. Traditional embedded SoCs may not always provide the dedicated NPU power required for real-time, local inference.

Until now, upgrading AI performance often meant redesigning the entire hardware stack, leading to increased costs, longer development cycles, and higher project risks.

The Solution: A Decoupled AI Architecture

The FAI-ARA240-M introduces a "Decoupled AI Architecture." By separating AI acceleration from the host SoC, Forlinx allows developers to scale their system's "brainpower" independently.

Designed in a standard M.2 2280 form factor, the FAI-ARA240-M acts as a powerful co-processor. It can be easily integrated into existing platforms—such as those based on the NXP i.MX8M Plus or the next-generation i.MX95—via a simple M.2 M-Key interface. This modular approach significantly reduces time-to-market and allows legacy systems to evolve into AI-capable powerhouses.

Key Technical Highlights

Advanced Model Support: From Vision to Action

The FAI-ARA240-M is not just about raw numbers; it is about versatility. It supports a wide range of modern AI frameworks and architectures, enabling the next wave of industrial innovation:

• Generative AI: Real-time inference for LLMs and MMLMs.

• Multimodal Intelligence: Seamless handling of VLMs for complex environmental understanding.

• Robotic Interaction: Supporting VLA (Vision-Language-Action) models to bridge the gap between perception and physical execution.

• Mainstream Frameworks: Full compatibility with TensorFlow, PyTorch, and ONNX.

Built for the Toughest Environments

Forlinx Embedded understands that industrial applications demand more than just performance. The FAI-ARA240-M has undergone rigorous environmental testing to ensure reliable 24/7 operation. Its low-power design and optimized thermal architecture make it ideal for fanless, rugged systems where heat dissipation is a critical concern.

Target Applications

• Industrial Automation: Real-time defect inspection and multimodal sensory fusion.

• Healthcare: High-speed medical imaging and diagnostic assistance.

• Smart Transportation: Edge-based traffic analytics and autonomous navigation.

• Robotics: Drone and robotic systems requiring secure, on-device AI for critical operations.

The FAI-ARA240-M Edge AI Accelerator is available for order now. For more information, please visit the FAI-ARA240-M Product Page or contact our global sales team at sales@forlinx.com.

In the current global AI ecosystem, over 99% of applications focus on PC-based office automation. However, in the embedded Linux space, the challenge of seamlessly enabling AI to control GPIO, UART, or industrial sensors still remains.

With the OK1126B-S development board's powerful edge computing capabilities, OpenClaw is bridging this gap through its Skills framework. This article will break down the core logic behind Skills and demonstrate how a standardized "manual" allows AI to control hardware with the precision of an experienced engineer.

1. OpenClaw Skills Ecosystem

If the model itself is the "brain," then Skills serve as the "experience + action guidelines.” By creating Skills, we can transform OpenClaw from a passive responder into an active AI that can autonomously complete complex tasks based on predefined rules.

As of today, ClawHub's community has released over 26,000 Skills. However, over 99% of these Skills are designed for Windows, x86 Linux, or Mac platforms, focusing mainly on office and web automation. Few Skills are developed for embedded Linux, and those that exist are not mature enough, often lacking standardized encapsulation and driver adaptation for embedded peripherals (GPIO, UART, SPI, I2C, sensors, motors, cameras). Additionally, there is a significant gap in specialized Skill sets designed for edge computing, low-power, and real-time applications in fields like industrial control, robotics, smart homes, and automotive systems.

So, does the embedded field not deserve "lobster" too?

In this article, we will demonstrate a simple example—controlling the blink pattern of an LED on the OK1126B-S development board—and gradually break down the design and usage of Skills, starting from the basics.

2. What Are Skills?

In essence, Skills are like an "operating manual." They don't directly perform tasks for AI but tell AI when, how, and what to do.

Let's simplify it with an analogy: In a shooting game, the player's goal is to defeat enemies. The gun, as a tool, has a simple role:

• Input: Pull the trigger

• Output: Fire

Where the bullet lands is not the gun's concern. The Skill, however, functions as the "tactical guide." It tells AI:

• When to shoot (detecting an enemy)?

• When not to shoot (friendly forces ahead)?

• When to stop (enemy's health reaches zero)?

With these rules, AI transitions from being a mechanical tool that executes commands to one that possesses decision-making abilities, thinking and reasoning in a more human-like manner.

2.1 Basic Structure of a Skill

In OpenClaw, a Skill is essentially a structured directory, typically found at:

~/.openclaw/workspace/skills/${SKILL_NAME}

A complete Skill is composed of four parts:

Naming rules:

The directory name of a Skill must follow the naming convention, or it will not be recognized:
Only lowercase letters, numbers, and hyphens (-) are allowed.
Example: gpio-led-control

This convention, though simple, is crucial in actual development. Many issues with loading Skills are often caused by violations of this rule.

2.2 Detailed Explanation of SKILL.md

The SKILL.md file is the heart of the Skill, akin to a "manual + behavior guide." It consists of two parts:

① Metadata (Preliminary Information)

Enclose with --- to define the basic information of the Skill. This information serves to:

• Help OpenClaw recognize the Skill

• Provide semantic matching (keywords to trigger the Skill)

For example:

name: gpio-led-control # Required
description: description: GPIO LED control for development boards # Required
(Some options are listed below for reference only)
user-invocable: true # Optional: Whether it can be called directly by the user

② Main Content (Action Guidelines)

The main content serves as the specific action guide, which can be organized flexibly based on requirements. To illustrate, here's a simplified version of the SKILL.md for "gpio-led-control":

# GPIO LED Control - Development Board LED Control
Control the system LEDs (e.g., work/net) on boards like the OK1126B-S.
## Quick Start
### View Available LEDs
### Control LED On/Off
## Example Usage
## Permissions
## Notes

In practice, the SKILL.md file can be extended based on specific needs, such as adding logic for execution conditions (when to run), error handling, parameter explanations, and example inputs/outputs. In addition to the core SKILL.md file, the other three directories serve auxiliary roles, each with its distinct function.

scripts/: This directory is mainly used to store executable script files. It's suited for scenarios where the execution logic is fixed and doesn't require frequent changes, such as tasks like controlling the on/off state of an LED. These scripts can be directly invoked, which reduces the need for redundant code generation and increases overall execution efficiency and stability.

references/: This directory is used to organize various reference materials, such as API documentation, database structure explanations, or operation manuals. These materials are not loaded all at once; instead, they are brought in as needed based on context. This approach helps avoid unnecessary resource consumption and ensures that AI has access to deeper, more professional knowledge at critical moments.

assets/: This directory is where various resource files, such as templates, images, and other media, are stored. Unlike references, the contents here are not part of the model's contextual reasoning but serve to enhance the final output, such as providing report templates or images for the output. These resources elevate the presentation and completeness of the Skill's results.

2.3 Process of Writing a Custom Skill

Once we understand the structure, it's time to start writing our own Skill. The process can be summarized as:

Requirement Analysis → Resource Planning → Initialization → Writing → Packaging → Testing

Step 1: Requirement Analysis

Before diving in, clearly define:

• What problem the Skill will solve?

• What is the usage scenario?

• How will users trigger it?

• What are the inputs and outputs?

Trigger conditions must be clearly defined, otherwise, the Skill may fail to be invoked or be incorrectly triggered.

Step 2: Resource Planning

Decide if you need:

• scripts (Do you need executable code?)

• references (Do you need documentation?)

• assets (Do you need resources?)

Proper planning upfront helps avoid structural confusion and redundancy caused by repeated revisions later on.

Step 3: Writing and Debugging

We can leverage OpenClaw to automatically generate a standardized initial template for a Skill in a designated directory, which can then be further refined. However, it's important to note that this auto-generated Skill is just a "starting point" and usually doesn't meet actual requirements right away. To truly deploy it, the content still needs to be gradually adjusted and tested iteratively based on the specific scenario, ultimately refining it to achieve the desired functionality.

3. Real-World Skill Example

To better understand, we've created a simple Skill for controlling two LEDs on the OK1126B-S development board. Once the Skill is connected, OpenClaw:

1. ① Recognizes the user's intent

2. ② Matches the appropriate Skill

3. ③ Executes actions according to SKILL.md rules

4. ④ Calls the necessary scripts and returns results

This entire process runs autonomously, enabling true “natural language control of hardware.”

4. Conclusion

By breaking down the core concepts of Skills and demonstrating them with a simple LED control example, we've highlighted the practical application of Skills. Even for basic hardware control scenarios, this example demonstrates the core value of Skills: turning complex processes into reusable, standardized capability units.

The design philosophy behind Skills is to enable streamlined command execution and standardized actions. After the Skill is built, a single command is all it takes for AI to execute tasks according to predefined rules. This not only eliminates redundant development and debugging but also ensures stability and consistency across various scenarios. Skills offer tremendous value in embedded development, automated operations, and smart device management.

The embedded space is a key breakthrough area for the OpenClaw ecosystem. It is essential for real-time hardware interaction, edge intelligence deployment, and represents the most promising growth area with the highest demand for quality capabilities. By continuously building a rich, user-friendly, and reliable embedded Skills pool, OpenClaw can break free from its desktop tool limitations and evolve into a comprehensive smart execution framework that spans the entire "cloud-edge-device" chain.

Amid the profound transformations of Industry 4.0 and the energy transition, core computing units are confronted with unprecedented challenges: harsh physical environments, complex protocol interoperability, and growing uncertainty in global material supply chains. Today, the FCU1501 Industrial Gateway is officially released. It is not only a high-performance communication hub but also a long-term supply commitment for global industrial customers. With deep control over underlying technology, the FCU1501 ensures stable delivery and reliable operation throughout the entire project lifecycle, safeguarding your business from external fluctuations.

Underlying Architecture Resilience: High-Performance Industrial-Grade Hardware and Supply Assurance

The success of industrial projects often depends on 5-10 years of smooth operation. A highly controlled material system is established for the FCU1501, with each component rigorously evaluated for long-term supply, ensuring stability and eliminating risks of disruption due to external factors, providing vital business continuity for power, transportation, and other infrastructure projects.

• High-Performance Industrial Main Control: Equipped with Rockchip RK3506J processor, three-core Cortex-A7 architecture, up to 1.5GHz, low power consumption, and high computational capability, handling industrial protocol conversion, edge data cleaning, and local logic control tasks effortlessly.
• Flexible Storage Configuration: Available with 256MB/512MB DDR3 memory and 256MB NandFlash/8GB eMMC storage options, supporting large-scale historical log storage, offline data continuation, and frequent remote firmware upgrades (OTA).
• Electrical Safety and High Availability: Supports DC 9-36V wide voltage input with reverse and overcurrent protection, adapting to complex power environments in industrial sites. Built-in hardware watchdog and high-precision RTC ensure 24/7 stable operation.
• Latest Mainstream Kernel: Pre-installed with the stable Linux 6.1 operating system, providing enhanced security and broader hardware driver support, simplifying secondary development.

Industrial-Level Physical Protection: Full-Temperature and Extreme Environment Stability

Every design detail of the FCU1501 is built to withstand harsh industrial environments:

• Extreme Temperature Immunity: Passed full-temperature cycling tests from -40°C to +85°C, ensuring stable output in cold polar or hot desert environments.

• Triple Electromagnetic Protection: Follows industrial-grade EMC standards, maintaining stability in environments with high electromagnetic interference.

• Physical Lossless Cooling: Utilizes a fanless passive cooling solution, eliminating mechanical failures and dust accumulation, significantly reducing maintenance costs.

Flexible Interfaces: Architecture Consistency for Seamless System Upgrades

FCU1501 innovatively achieves "the same physical size, two interface configurations" architecture consistency.

• Basic Version: Efficient and suitable for standardized connection needs.
• Extended Version: Abundant interface resources, including 8x RS485, 2x CANFD, 8x DI/DO, etc.
• Seamless Evolution: Easily switch between models without altering the control cabinet structure, reducing system integration time.

Smart Operation and Maintenance System: Modern Software Ecosystem and Visual Management

The core value of industrial gateways lies in protocol conversion and convenient maintenance. The FCU1501 excels in this, bridging OT and IT data silos for easier device interconnectivity.

• Protocol Support: Built-in Modbus, MQTT, TCP/IP, SSH, OpenVPN, and other mainstream protocols, covering most industrial communication needs;

• Web Visual Management: Provides a web management interface that can be accessed via a browser to complete network setup, communication parameters, and system status monitoring, improving maintenance efficiency by 50%;

• Out-of-the-Box: Integrated functions such as one-click recovery, 4G status indicator, external power output, and USB flash write, allowing quick deployment without additional accessories, significantly shortening on-site implementation time.

Full-Scene Business Empowerment: Industrial Connectivity Hub Compliant with Global Standards

With powerful performance, rich interfaces, and high reliability, FCU1501 can be widely used in various industrial scenarios, becoming the core hub for digital upgrades.

• Power and Energy Storage: Energy Management Systems (EMS), battery monitoring, new energy site data forwarding.
• Rail Transportation: Roadside equipment monitoring, bridge health management.
• Smart Manufacturing: Production line data collection, PLC remote control, edge logic computing.

The CE, FCC, and RoHS certification process for the FCU1501 has commenced, ensuring compliance with global market safety and environmental standards. With its diverse installation options (such as DIN rail mounting and hanging brackets), it truly achieves "global compatibility, ready to use out of the box."

In edge AI development, hardware selection often determines the fundamental stability and development timeline of a project. To help developers bypass lengthy parameter comparisons, this article will break down key technical points in just 3 minutes, providing an in-depth look at the Forlinx Embedded FET1126-S SoM. Designed based on Rockchip RV1126BJ, this module is specifically engineered to overcome performance bottlenecks and optimize power efficiency for on-device AI deployment. This guide enables a swift evaluation of how well the solution fits project requirements.

Click above to explore the FET1126BJ-S SoM in detail

Overview of FET1126BJ-S Key Features

To enable rapid evaluation of hardware compatibility, the four core technical advantages of this Rockchip RV1126BJ-based System-on-Module (SoM) in edge AI applications are summarized:

• Balanced Performance & Power: 3 TOPS @ INT8 AI computing power, capable of running 2B-parameter models locally, with low-power design suitable for portable and embedded devices.

• Complete Software Ecosystem: Comprehensive BSP support, compatibility with mainstream frameworks, enabling quick onboarding for beginners and shorter development cycles.

• Powerful Vision Processing: Commercial-grade hardware delivering industrial-grade performance, requiring no customization, with controllable mass production costs.

• Industrial-Grade Reliability: Wide operating temperature range (-40℃ to 85℃), electromagnetic interference resistance, suitable for extreme environments such as factory floors and outdoor applications.

1 Minute to Lean Key Specifications

• Core AI Performance: Built-in independent NPU with 3 TOPS @ INT8 computing power, supporting mixed-precision operations and Transformer model optimization. Capable of running 2B-parameter LLMs and multimodal models locally, eliminating cloud dependency, and well-suited for diverse edge AI scenarios.

• Processor Performance: Rockchip RV1126BJ quad-core ARM Cortex-A53, up to 1.6GHz, ensuring smooth multitasking.

• Image Processing: VPU supports 4K@30fps H.264/H.265 hardware decoding, AI-ISP supports 8M@30fps input with denoising, HDR, etc., without consuming NPU resources.

• Storage & Size: LPDDR4 memory (1/2/4GB optional), eMMC storage (8/16/32/64GB optional). Commercial-grade chips cover wide-temperature range; compact 40mm × 40mm form factor, combined with stamp hole and LGA connectors, featuring 237 pins for excellent expandability, saving space in end devices.

1 Minute to Learn Application Scenarios

Forlinx Embedded FET1126BJ-S SoM avoids ''over-engineering'' and focuses on precise fit for mainstream use cases, ensuring every advantage translates into practical applications across popular smart domains:

• Smart Security: Suitable for IP cameras, facial access control systems. Leveraging 3 TOPS AI power to perform real-time facial recognition and anomaly detection without cloud dependency. Fully compatible with offline facial recognition SDK, widely applied in subway facial access and smart community systems.

• Smart Industry: Embedded in industrial inspection equipment, utilizing rich industrial bus interfaces and AI computing for defect detection and equipment failure prediction.

• Smart Construction Sites / Campuses: Paired with edge terminals to enable safety detection (e.g., helmet compliance, intrusion detection) with fast local inference for timely alerts, ensuring construction and campus safety.

• Automotive Aftermarket: Wide-temperature and low-power characteristics make it ideal for dashcams, driver behavior analysis, and other in-vehicle terminals, ensuring stable operation.

Final Minute: Why Choose Forlinx Embedded?

While many RV1126BJ-based solutions exist in the market, for developers focused on project implementation, hardware is just the beginning—reliable ecosystem support and long-term supply are the real necessities:

• Simplified Development: Pre-installed Linux 6.1 OS, complete BSP packages, compatibility with TensorFlow, PyTorch, and other mainstream frameworks. Includes RKNN toolkit and AI algorithm examples, eliminating the need to develop drivers or port models from scratch, significantly shortening R&D cycles.

• Industrial-Grade Quality Assurance: All Forlinx Embedded products undergo rigorous industrial environment testing in labs to ensure stable, reliable quality, with 10–15 years longevity and guaranteed long-term supply.

• Proven Industry Expertise: With 20 years of embedded technology experience, Forlinx Embedded serves over 40,000 enterprise clients worldwide. As a professional supplier with in-house smart manufacturing lines and full-chain R&D capabilities, Forlinx offers not just SoMs, but end-to-end support from development evaluation to mass production.

OK—just 3 minutes!

Centered on the Rockchip RV1126BJ processor, the Forlinx Embedded FET1126BJ-S SoM delivers a balanced combination of computing power, energy efficiency, reliability, and cost-effectiveness. It is an optimal choice for edge AI deployment, suitable for both entry-level developers and enterprises scaling to mass production across a variety of popular smart application scenarios.

I. Overview

VLAN Concept: Virtual Local Area Network, which creates multiple ''virtual'' mini-switches on a single physical switch. Each mini-switch, or VLAN, acts as a separate broadcast domain, isolating network traffic between them at Layer 2 (the data link layer), similar to how they would operate if connected to different physical switches.

To implement this functionality, the key is to insert a 4-byte VLAN tag into a standard Ethernet frame. This tag includes a 12-bit VLAN ID that identifies the specific VLAN to which the frame belongs. Devices that support VLANs use this ID to differentiate and manage traffic from various virtual local area networks (VLANs).

II. Configuration Steps

1. Create a VLAN Virtual Interface

This file is used to create a virtual VLAN network device at system startup. In this case, "Name=vlan100" is the name assigned to the VLAN interface, and "Id=100" is the VLAN ID.

root@localhost:~# vi /etc/systemd/network/vlan100.netdev
[NetDev]
Name=vlan100
Kind=vlan
[VLAN]
Id=100

2. Configure the IP Address for the VLAN Interface

This file is used to assign IP addresses to the VLAN device that was created previously and to activate the configuration. If the VLAN needs to access an external network, you can configure a gateway. For example: Gateway=192.168.0.1.

root@localhost:~# vi /etc/systemd/network/vlan100.network
[Match]
Name=vlan100
[Network]
Address=192.168.0.70/24

3. Configure the Parent Interface

To enable VLAN traffic to pass through the physical network interface card, make sure that the parent interface (i.e. fm1-mac3) is active but does not have an IP address assigned to it (unless the interface has the IP address of the native VLAN). This step is very important as it informs the systemd-networkd network service that the primary function of the fm1-mac3 interface is to carry VLAN vlan100.

root@localhost:~# vi /etc/systemd/network/fm1-mac3.network
[Match]
Name=fm1-mac3
[Network]
VLAN=vlan100
# Key Point: Do not configure an IP address; instead, declare that this interface carries VLANs.
# If the physical interface needs to carry multiple VLANs in the topology, write: VLAN=vlan100,vlan200

4. Apply the Configuration

After creating the configuration files, restart the systemd-networkd service to activate the settings.

root@localhost:~# systemctl restart systemd-networkd

III. Verification

1. Configuration Information Declaration

VLAN configuration for Development Board 1

VLAN configuration for Development Board 2

2. Same VLAN ID Test

Now, connect the two network ports (192.168.0.78 and 192.168.0.70), which both have a VLAN ID of 100, directly using an Ethernet cable. Test them by pinging each other.

3. Different VLAN ID Test

The test shows that even IP addresses within the same subnet cannot respond to each other if their VLAN IDs differ.

In summary, testing VLAN functionality requires creating a virtual VLAN interface and linking it to a physically existing network port. This physical port can carry multiple VLAN interfaces. Subsequently, configure different VLAN IDs as needed to verify VLAN behavior.

IV. Capturing Packets to View VLAN Tags

When devices with the same VLAN ID communicate, the VLAN-tagged data frames can also be observed using tcpdump, as shown in the image below.

1. VLAN Identifier

The prominent vlan 100 in each line clearly indicates that the packet belongs to the virtual LAN with VLAN ID 100.

2. 802.1Q Tag

The ethertype 802.1Q (0x8100) in each line indicates that the Ethernet frame uses the 802.1Q protocol, which is the IEEE-defined standard for VLAN tagging. The hexadecimal value 0x8100 is the ''TPID'' embedded in the Ethernet frame header, signaling to network devices that ''this frame carries a VLAN tag.''

V. Setting VLAN ID on a PC

If you need to perform VLAN testing between a Windows PC and the development board, follow these steps to manually specify the VLAN ID for the network adapter:

1. Access Network Connections

Open the Control Panel, go to ''Network and Sharing Center,'' and click ''Change Adapter Settings'' on the left. Locate the physical network interface card connected to the development board.

2. Open ''Network Card Properties''

Right-click the network adapter icon and select ''Properties.'' In the pop-up window, click the ''Configure (C)...'' button.

3. Edit ''Advanced Settings''

In the network adapter settings window, switch to the ''Advanced'' tab. Scroll down in the ''Properties (P)'' list on the left to find ''VLAN ID''.

4. Set the VLAN ID

In the ''Value (V)'' input field on the right, enter the VLAN ID that matches the development board (for example, 100). Click ''OK'' to save the settings. The network adapter will then reload, applying the VLAN tags.

NUREMBERG, Germany—March 10, 2026—Forlinx Embedded presents its latest range of embedded modules and application-ready solutions at embedded world 2026 (Booth 3-561).

Pin-to-Pin Compatible SoMs & Edge AI Demos

At the show, we showcase diverse embedded modules including system-on-module, single-board-computer and embedded PCs. Many engineers are looking for high-scalability module to reduce their time and cost. To address this need, we introduced our new Pin-to-Pin compatible SoM series——UP4 Family.

With this UP4 P2P series, you can directly replace an older one without requiring changes to the baseboard design, wiring, or software. This means products can easily scale across performance tiers, allowing the same carrier board to support different SoMs depending on project requirements.

Highlights are below:

• LCC + LGA 487 available pins

• 40mm×40mm 1.2mm thickness

• One carrier board works for multiple SoMs

• SoC cross-brand compatible

• Various peripheral interfaces ready-to-use

• 48 reserved pin-outs

  

At embedded world 2026, we returned to the event with a strong focuses on real-world AI inference, industrial networking, and multi-display ARM computing, designed for industrial automation, smart energy, intelligent security, and edge AI applications.

• High-Performance AI Pipeline: A collaboration with NXP featuring the i.MX 95 applications processor and the Ara240 Discrete NPU. By combining the 8 eTOPS Neutron NPU with a 40 eTOPS accelerator, this solution handles complex multi-modal queries for industrial security.

• 360° Surround-View: An RV1126B-based solution that stitches four AHD camera feeds into a seamless panoramic view, optimized for power efficiency.

• Face Recognition & Tracking: An RV1126B 3TOPS NPU-driven system for instant feature extraction and local database matching.

• Edge Intelligence: The FCU3501 embedded computer demonstrates local video analytics. With a 6TOPS NPU, it can process up to 16 camera streams simultaneously for real-time surveillance.

• Intelligent Display Solution: The i.MX 94x solution features a built-in TSN switch and Cortex-M7/M33 real-time cores. It is designed for edge computing tasks that require both high-speed control and functional safety.

• Battery Management (BMS): A dedicated solution for Energy Storage Systems (ESS) using the T536 SoC, supporting 8×CAN interfaces for large-scale battery data acquisition.

• EV Charger HMI: A UI demo using the TI AM62L32 and LVGL library, showing fluid animations and data visualization while maintaining low power consumption.

  

Strategic Ecosystem: NXP & ROCKCHIP & CRA

As a Gold Partner of NXP Semiconductors, Forlinx continues to deepen its collaboration by expanding the i.MX 95 ecosystem with high-performance inference modules. At the heart of our presence at the show is the jointly multimodal industrial security demo based on the i.MX 95 processor and Ara240 computing card, enabling secure, AI-ready, and scalable edge solutions ranging from different industrial applications.

Forlinx also maintains a long-term partnership with Rockchip. At Embedded World 2026, we showcased our latest system on modules based on the Rockchip RK3588, Rockchip RV1126, and Rockchip RK3506 platforms at both Rockchip booth and Forlinx booth, highlighting our close collaboration in embedded AI solutions.

To address growing cybersecurity regulations such as the EU Cyber Resilience Act (CRA), Forlinx presented its CRA-ready embedded platform, the FCU2601. With dual IEC 62443 certifications, the platform helps device manufacturers accelerate compliance with global cybersecurity regulations while ensuring robust industrial-grade security.

Having gone through the entire certification process ourselves, we are deeply familiar with the complex documentation and compliance workflow. This experience allows us to share proven practices with customers and help simplify the path to market, especially for products targeting the European market.

Global Dealership Showcases

Quad-Screen Display Solution built on the OK3588 single board computer from DATA MODUL in Germany: Powered by the Rockchip RK3588 processor, the system supports four independent displays with different video content from a single embedded board, eliminating the need for multiple boards or external graphics processors.

AI Image Recognition Solution built on the OK3576 single board computer from Demsay in Turkey: Demonstrating efficient local object recognition using YOLOv5 on the 6TOPS NPU of the RK3576 platform.

About Forlinx Embedded

Forlinx Embedded is a leading designer and manufacturer of ARM-based embedded solutions, including System-on-Modules (SOMs), Single Board Computers (SBCs), and industrial embedded PCs. Partnering with top System-on-Chip vendors such as NXP, Texas Instruments, Rockchip, and Allwinner, we deliver high-quality products compliant with CE, FCC, and RoHS standards. With in-house production certified to ISO 9001, ISO 13485, ISO 45001, and ISO 14001, as well as dedicated environmental and EMC laboratories and SMT lines, we ensure reliable manufacturing with an annual System-on-Module output of 1 million units.

Contact us for UP4 Family Details

In embedded Linux development, serial port debugging is commonly favored for its simplicity and accessibility. However, when deploying applications in an AMP-based real-time environment, these limitations become significantly more pronounced—namely poor real-time capability, high system overhead, and limited debugging depth. These drawbacks are especially evident in multi-core collaborative workflows, where tasks such as precisely analyzing inter-core synchronization mechanisms, interrupt timing behavior, or shared-resource conflicts often exceed the capabilities of traditional serial debugging methods.

JTAG Debugging Technology: A Precision Solution to This Pain Point

JTAG (Joint Test Action Group) debugging technology is an internationally standardized technology widely used in embedded system development and hardware testing. It possesses deep interaction and real-time control capabilities, allowing users to set breakpoints online and perform single-step debugging, while also supporting the real-time viewing and modification of register and variable values. More critically, its non-intrusive debugging mode eliminates the need to insert print statements into the code, preserving the original program logic and operational performance to the greatest extent. It can also pause the CPU at any time to accurately capture the complete system state at a given moment, enabling the rapid localization of various complex debugging challenges.

Solution Architecture: An Integrated JTAG Debugging Workflow

Here, we use the Forlinx OK3568-C development board (based on the Rk3568) for the demonstration:

Forlinx delivers a tightly integrated toolchain that enables seamless JTAG debugging within a Windows environment.

There are three key layers: the Development Host, the Hardware Interface, and the Target Device.

The development host layer is based on Eclipse IDE, integrates CDT development tools and GNU MCU Eclipse plug-ins, and provides a friendly graphical interface. Debugging instructions are generated by GDB, converted by OpenOCD protocol, and finally communicated with RK3568 chip through J-Link hardware interface.

The key strength of this architecture lies in its integration and transparency. Developers can focus entirely on code logic and problem-solving without dealing with low-level communication complexities.

Debugging in Practice: A Visual and Interactive Workflow

1. Breakpoint Control

With Forlinx's JTAG solution, breakpoint debugging is intuitive. Engineers can set breakpoints by double-clicking on the left side of the code, where program execution automatically pauses, making it easy to check the state of all core variables, registers, and memory at the moment.

(1) Set a breakpoint: Double-click the left side of the code. When a "blue ball" appears, it indicates that there is a breakpoint here. The program will stop here.

(2) Cancel the breakpoint: Double-click the "blue ball" on the left side of the code. When the ball disappears, it means that the breakpoint here is cancelled.

(3) Ignore all breakpoints: At this time, all breakpoints are cancelled and the program can run at full speed.

2. Single-step and Multi-step Execution

There are several modes of single-step execution: Step Over can skip the function call, Step Into can go deep inside the function, and Step Return can quickly execute the rest of the current function.

Multi-step execution: including "Run to the cursor" and "Continue to run" to meet the needs of different scenarios.

3. Variable Inspection

(1) Local Variables update in real time within the current function scope and can be modified directly.

(2) Global Variables remain accessible throughout the session, providing a live view of system-wide state when paused.

4. Memory Inspection

(1) Direct Access and Modification

Using the Memory Browser, engineers can read any memory or register address to inspect content or verify configurations.

(2) Live Editing

Values can be written directly to specified addresses, enabling dynamic data changes or peripheral register updates.

The JTAG debugging solution outlined above, tailored for AMP multi-core collaborative scenarios, significantly lowers the technical barrier to entry for real-time core debugging. By visualizing the debugging process and enabling simultaneous monitoring of AMP real-time core states, it makes actions like program jumps and task switching much clearer. We hope this solution will be helpful to your development work.

Background

In a Linux system, when two network interface cards (NICs) are configured with IP addresses within the same subnet, the default routing table generally utilizes only the most recently activated NIC interface. Consequently, the other NIC may be unable to communicate as intended. To address this issue, policy routing can be implemented. This allows each network interface to operate independently, effectively preventing routing conflicts.

Kernel configuration

First, confirm that policy routing support is enabled in the kernel. By default, this feature is not activated, so manual configuration is required:

Access the kernel source directory at /62xx/OK62xx-linux-sdk/OK62xx-linux-kernel/ and run the following command:

forlinx@ubuntu:~/62xx/OK62xx-linux-sdk/OK62xx-linux-kernel$ 
. /opt/arago-2023.04/environment-setup-aarch64-oe-linux 
forlinx@ubuntu:~/62xx/OK62xx-linux-sdk/OK62xx-linux-kernel$ make menuconfig 

Based on the following screenshot, locate the policy routing configuration path.

Select the indicated option with the arrow, press the Y key to compile it into the kernel.

Then select Save.

Click OK.

Repeatedly press ESC to exit

Next, navigate to the directory ~/62xx/OK62xx-linux-sdk and begin compiling the kernel based on the core board parameters:

forlinx@ubuntu:~/62xx/OK62xx-linux-sdk$ sudo ./build.sh kernel hsfs 2g

Enter N when prompted.

If the following message appears, press and hold the Enter key:

Development Board Configuration

Once compilation is successful, move the Image file from the /62xx/OK62xx-linux-sdk/images directory to the /boot/ directory on the development board.

Execute

root@OK62xx:/# sync
root@OK62xx:/# reboot

Configuring Routing Tables

After rebooting, open the routing table configuration file /etc/iproute2/rt_tables:

root@OK62xx:/# vi /etc/iproute2/rt_tables

Add two routing tables:

100 eth0table

200 eth1table

Save.

Configuring Policy Routing

Next, set up routing policies for each network interface. Assuming eth0 has IP address 172.20.2.131 and eth1 has 172.20.2.132, execute the following commands to configure routing policies:

Add routing policies for eth0:

root@OK62xx:/# ip route add 172.20.2.0/24 dev eth0 table eth0table
root@OK62xx:/# ip route add default via 172.20.2.254 dev eth0 table eth0table
root@OK62xx:/# ip rule add from 172.20.2.131 table eth0table

1. First command: Specify that network segment 172.20.2.0/24 should use eth0 as its egress interface.

2. Second command: Set the default gateway for external network access (adjust gateway IP as needed).

3. Third command: Route all traffic from IP 172.20.2.131 through routing table eth0table.

Add routing policies for eth1:

root@OK62xx:/# ip route add 172.20.2.0/24 dev eth1 table eth1table
root@OK62xx:/# ip route add default via 172.20.2.254 dev eth1 table eth1table
root@OK62xx:/# ip rule add from 172.20.2.132 table eth1table

Test

At this point, you can verify whether the configuration is successful by using the ping command on a PC:

When the Ethernet cable is connected to eth0, you should be able to reach 172.20.2.131. When connected to eth1, you should be able to reach 172.20.2.132.

Both IP addresses should be ping-able.

Persistent Configuration

Policy routing configurations, like network settings, are not retained after reboot—they need to be automatically applied on startup. Therefore, a service that runs at boot must be added.

Create a startup service for this purpose.

root@OK62xx:/# vi /etc/systemd/system/persistent-routes.service

Add the followings:

[Unit]
Description=Persistent Static Routes and Rules
After=network-online.target
Wants=network-online.target
[Service]
Type=oneshot
ExecStart=/usr/bin/persistent-routes.sh
[Install]
WantedBy=multi-user.target

Add script.

root@OK62xx:/# vi /usr/bin/persistent-routes.sh

Add the followings:

#!/bin/sh
sleep 5
# Add Routes and Rules
ip route add 172.20.2.0/24 dev eth1 table eth1table
ip route add default via 172.20.2.254 dev eth1 table eth1table
ip rule add from 172.20.2.132 table eth1table
ip route add 172.20.2.0/24 dev eth0 table eth0table
ip route add default via 172.20.2.254 dev eth0 table eth0table
ip rule add from 172.20.2.131 table eth0table

Give permission to the script:

root@OK62xx:/# chmod 777 /usr/bin/persistent-routes.sh

Enable the service

root@OK62xx:/# systemctl enable persistent-routes.service

This way, the configuration is automatically applied upon every system startup.

Summary

Through the steps above, dual network interfaces in the same subnet have been successfully configured, with policy routing avoiding routing conflicts. After configuration, both network interfaces can operate stably for network debugging or data transmission, providing reliable support for high‑availability embedded applications.

Through the steps above, dual network interfaces in the same subnet have been successfully configured on the OK6232 development board, with policy routing effectively avoiding routing conflicts. After configuration, both network interfaces of the FET6232-C core board (based on the TI AM62x processor) can operate stably for network debugging or data transmission, providing reliable support for high‑availability embedded applications developed by Forlinx Embedded.

March 10, 2026 — embedded world 2026, the premier annual global event for embedded technology, kicked off grandly at the Nuremberg Exhibition Centre in Germany.

At the exhibition (Booth NO.3-561), Forlinx Embedded made a strong return, unveiling a series of cutting-edge products and integrated solutions designed for diverse scenarios. This showcase highlighted the innovative strength and competitive edge of China's embedded technology sector, reinforcing Forlinx's commitment to accelerating its global footprint

01 Comprehensive & Diversified

At the exhibition, Forlinx Embedded showcased a diverse product lineup, including embedded SoMs, development boards, industrial computers, and edge computing gateways,based on leading chip platforms from NXP, Rockchip, Allwinner, and TI.

The demos highlighted the high performance and reliability of its solutions in edge AI, industrial automation, smart displays, and EV charging. They emphasized Forlinx's collaboration with leading global chip manufacturers and its expertise in hardware R&D and integrated solution development.

02 Full-Scenario & Engaging

Multiple first-launch dynamic demo at the booth:

• i.MX 9596 + Ara240 perception and understanding platform

• i.MX 94x smart display solution

• FCU3501 edge computing gateway (RK3588J-based) with 16 x AI video processing

• RV1126B four-camera panoramic stitching system

• T536 8 x CAN technology module

• TI AM62L interactive EV charger solution

These cutting-edge platforms attracted keen interest and engagement from attendees.

Swipe Right to View More > >

Also on display is the FCU2601 embedded control unit—already certified with IEC 62443-4-1 and IEC 62443-4-2 security standards—and EN 18031 (RED) cybersecurity certification. This ensures compliance with regulations such as the EU Cyber Resilience Act (CRA) and supports secure, compliant deployments worldwide.

03 Ecosystem Collaboration, Co-Exhibition Experience

At embedded world 2026, Forlinx Embedded continued to strengthen cooperation with chip manufacturers. Partners including NXP, Rockchip, and TI provided valuable joint exhibition opportunities. At their respective booths, Forlinx SoMs, development boards, and dynamic demos—developed around each partner's leading products—drew strong interest from international visitors.

04 Persistent Dedication & Innovation

With over 20 years of dedication to embedded technology, Forlinx Embedded is committed to innovation, quality, and customer success. Forlinx's presence at embedded world Germany was more than a branding display; it represented a strategic advance in forging international partnerships and accelerating global market growth.

Looking forward, Forlinx Embedded will maintain its commitment to innovation, prioritize customer needs, and continuously refine its products. By deepening collaboration with global partners, Forlinx aims to deliver advanced embedded solutions that empower industries worldwide and drive sustainable growth in the embedded ecosystem.

Join us at Booth NO.3-561 on March 11–12 for more insights, demonstrations, and conversations about the future of embedded technology.

Together, we build what's next.

The global premier event for embedded systems — Embedded World 2026 — will take place in Nuremberg, Germany, from March 10 to 12. As a Gold Partner of NXP® Semiconductors, Forlinx will be present at Booth H3-561 to showcase breakthroughs and real-world applications of AI in industrial security and beyond.

During the event, Forlinx will showcase a diverse range of embedded products including System on Modules (SoMs), development boards, and embedded PCs based on NXP's applications processors, including the i.MX 9, i.MX 8, and i.MX6 processors, Layerscape® processors, and i.MX RT crossover MCU series. Dynamic demos will cover multiple scenarios such as edge AI, smart industry, and smart cities.

A highlight will be the debut of a Multi‑Modal Demo for Industrial Security based on the NXP i.MX 95 applications processor and Ara240 Computing Card, co‑developed by Forlinx and NXP. The solution establishes an efficient dual‑hardware inference pipeline by integrating the 8 eTOPS eIQ® Neutron NPU in NXP's i.MX 95 applications processor with the up to 40 eTOPS Ara240 Discrete NPU (DNPU) accelerator, thereby closing the perception‑inference‑action loop and advancing industrial security.

The demo illustrates three core advantages:

• Hybrid NPU Acceleration for Efficient Dynamic Task Allocation: Achieving efficient task division and collaboration between the i.MX 95 applications processor and Ara240 DNPU for real‑time video analysis and multi‑modal query tasks.
• Edge‑End Collaboration with High Efficiency & Reliability: Leverages an integrated edge‑to‑end inference architecture to ensure on‑device recognition and search tasks are performed with both low latency and high reliability.
• Multi‑Modal Generalization: Empowering industrial scenarios to achieve zero-shot recognition and understanding vision and language.

Since first collaborating in 2014, Forlinx and NXP have developed over 20 embedded solutions utilizing NXP chips, driving intelligent transformation across various industries globally. Moving forward, Forlinx is committed to strengthening the collaborative partnership with NXP, dedicated to providing global customers with superior and highly reliable embedded products and services, and working together to foster a thriving and dynamic industry ecosystem.

We warmly invite industry peers, partners, and media friends to join us at the Forlinx booth (H3-561) during Embedded World 2026 for face‑to‑face communication. Let's explore the future of embedded intelligence and AI integration—see you in Nuremberg!

Recently, Forlinx Embedded has achieved a significant milestone with its FCU2601 embedded control unit securing dual IEC 62443 certifications:

IEC 62443-4-1 for secure development processes and IEC 62443-4-2 for component security. This accomplishment underscores the establishment of a comprehensive product security lifecycle system in industrial control and edge computing, positioning the company to proactively meet upcoming regulations such as the EU's Cyber Resilience Act (CRA).

Following the EN 18031 (RED) cybersecurity certification earned in February of this year, this achievement represents another milestone breakthrough for Forlinx Embedded in the field of industrial and critical infrastructure cybersecurity, demonstrating that its security development framework and product security capabilities now stand at an internationally leading level.

Certifications: IEC 62443-4-1 & IEC 62443-4-2

Why Is IEC 62443 the ''Gold Standard'' for Industrial Cybersecurity?

As Industry 4.0 and smart manufacturing accelerate, industrial control systems are increasingly exposed to cyber threats such as ransomware and advanced persistent threats (APTs), which can disrupt operations, compromise infrastructure, and pose serious safety risks.

The IEC 62443 series—jointly developed by ISA and IEC—is globally regarded as the defining cybersecurity framework for industrial automation and control systems. Often described as the ''constitution'' of industrial cybersecurity. It covers the entire lifecycle—from product development and system integration to operation and maintenance—and imposes stringent technical requirements on embedded devices, network equipment, and more.

By achieving these certifications, the FCU2601 demonstrates compliance with international top-tier standards in key areas including:

• Secure development lifecycle (SDL)

• Access control and authentication

• Data integrity and confidentiality

• Vulnerability management and patch governance

This provides a robust, certified foundation for deploying secure embedded control solutions in sensitive and critical environments.

Click the image above to learn more about the FCU2601 embedded control unit.

CRA Compliance Is Now Imminent！Non‑Compliance Risks Heavy Fines & Market Bans

The EU Cyber Resilience Act (CRA) entered into force in December 2024 and will become fully applicable by December 11, 2027. Under the CRA, all hardware and software products containing digital elements must comply with mandatory cybersecurity requirements throughout their lifecycle to obtain CE marking and access the EU market.

Penalties for non‑compliance are severe: Serious breaches may lead to fines of up to €15 million or 2.5% of worldwide annual turnover (whichever is higher). Non‑compliant products will be banned from sale in the EU market.

The CRA classifies products into three categories: General, Critical Class I, and Critical Class II. Industrial control systems, energy storage gateways, smart meters, and similar equipment are considered critical and require independent third‑party certification. For businesses aiming to operate globally, CRA compliance is no longer optional — it is a mandatory gateway to international markets.

Key CRA Compliance Deadlines

With less than six months until vulnerability reporting becomes mandatory on September 11, 2026, time is pressing.

A complete IEC 62443 certification process typically takes 6–9 months. Delaying your preparation now could result in missed deadlines, failure to demonstrate compliance to EU regulators, and significant legal and commercial exposure.

Forlinx Embedded: Your Partner for Streamlined CRA Compliance

As a specialist in embedded intelligent device core platforms, Forlinx Embedded understands the compliance challenges faced by globally expanding enterprises. Forlinx dual IEC 62443 certifications not only validate Forlinx internationally recognized security capabilities but also enable us to share proven methodologies with customers—helping them meet CRA and other global cybersecurity regulations efficiently and cost‑effectively.

What Forlinx Can Do

1. Secure Development Lifecycle (SDL) Consulting

   Full-cycle security development framework aligned with IEC 62443-4-1, covering requirements, design, coding, testing, and maintenance.

2. Product Security Design & Assessment

   Threat modeling, security architecture design, penetration testing, and vulnerability scanning for embedded devices, gateways, controllers, and more, following IEC 62443-4-2.

3. SBOM Generation & Management

   Automated Software Bill of Materials generation, risk analysis, open‑source vulnerability tracking, and timely security update response in compliance with CRA requirements.

4. Vulnerability Management & Security Updates

   Established vulnerability response processes and secure update/patch mechanisms for ongoing product lifecycle protection.

5. Pre‑Certification Testing & Compliance Guidance

   Leverage our certification experience to conduct pre‑testing, identify issues early, shorten certification cycles, and reduce overall compliance costs.

The IEC 62443 certifications reflect more than just product compliance—they represent a globally recognized validation of Forlinx end-to-end security development processes and technical maturity.

Built upon this robust and proven framework, Forlinx systematically replicate these capabilities across customized projects, empowering customers to achieve CRA compliance efficiently for PLCs, gateways, HMIs, RTUs, industrial computers, and other platform products—accelerating their entry into international markets.

Security Is the Baseline—and Your Accelerator to Global Markets

From EN 18031 to IEC 62443, every step Forlinx Embedded takes in industrial cybersecurity is deliberate, rigorous, and outcome-driven. Forlinx recognizes that the future of Industry 4.0 hinges not only on operational efficiency but also on resilient, secure infrastructure. With the full enforcement of the EU CRA approaching, partnering with Forlinx Embedded provides a compliant, reliable, and low-risk pathway to global expansion.

If you are planning to enter or expand in international markets—or seek practical, experienced guidance on CRA and IEC 62443 certification—reach out today. With deep certification expertise and a partner-oriented approach, Forlinx Embedded is ready to support your globalization journey and explore global opportunities together.

This technical guide provides professional methods for integrating user product files, applications, and shared libraries into the OK3562-linux-source. By leveraging the Buildroot fs-overlay mechanism, you can compile custom assets directly into the system image, which effectively avoids the need to separately copy programs to the OK3562-C ARM development board after burning the firmware.

Modification Method

Method 1: Compile directly into the source code

Location path:

User programs can be copied to the/OK3562-linux-source/build root/board/forlinx/ok3562/fs-overlay/usr/bin directory.

The configuration file can be copied to the/OK3562-linux-source/build root/board/forlinx/ok3562/fs-overlay/etc directory.

The library file can be copied to the/OK3562-linux-source/buildroot/board/forlinx/ok3562/fs-overlay/lib directory.

You can also create your own folders in the/OK3562-linux-source/buildroot/board/forlinx/ok3562/fs-overlay/directory to store their own files.

This article takes copying aarch64-buildroot-linux-gnu _ sdk-buildroot. tar. gz compressed package as an example.

1. Copy the file to the specified path

Create a directory called test at/OK3562-linux-source/buildroot/board/forlinx/ok3562/fs-overlay/. Place the aarch64-buildroot-linux-gnu _ SDK-buildroot. tar. gz archive in this directory:

2. Source Code Compilation

Execute the full compilation command

./build. sh all

3. Development Board Verification

Using the update.img generated by compilation, boot the device. You can see a directory named test exists in the file system.

In summary, the test was successful.

This configuration is a one-time setup. The added files will be automatically included in all future image compilations, even after modifications to the source code’s device tree or drivers.

4. Removing the Added Files

When deleting, in addition to the files added in
OK3562-linux-source/buildroot/board/forlinx/ok3562/fs-overlay/,
you also need to search whether there are any in
OK3562-linux-source/buildroot/output.
For example, when compiling the above compressed package,
test/aarch64-buildroot-linux-gnu_sdk-buildroot.tar.gz was also created in
OK3562-linux-source/buildroot/output/OK3562_Linux/target/,
and this also needs to be manually deleted.

After deleting, a recompilation is required.

Method 2: Mounting rootfs.ext2

Once the source code is compiled, or for temporarily adding files to a single image instance, you can directly mount the rootfs.ext2 file.

rootfs.ext2 path：OK3562-linux-source/buildroot/output/OK3562_Linux/images

1. After mounting rootfs.ext2, transfer files into it

forlinx@ubuntu:~/work/OK3562-linux-source$ cd buildroot/output/OK3562_Linux/images
forlinx@ubuntu:~/work/OK3562-linux-source/buildroot/output/OK3562_Linux/images$ ls
rootfs.cpio rootfs.cpio.gz rootfs.ext2 rootfs.ext4 rootfs.squashfs rootfs.tar
forlinx@ubuntu:~/work/OK3562-linux-source/buildroot/output/OK3562_Linux/images$ mkdir rootfs
forlinx@ubuntu:~/work/OK3562-linux-source/buildroot/output/OK3562_Linux/images$ sudo mount rootfs.ext2 rootfs
[sudo] forlinx password:
forlinx@ubuntu:~/work/OK3562-linux-source/buildroot/output/OK3562_Linux/images$ cd rootfs/
forlinx@ubuntu:~/work/OK3562-linux-source/buildroot/output/OK3562_Linux/images/rootfs$ ls
bin busybox.fragment dev etc home info lib lib64 linuxrc lost+found media mnt oem opt proc root run sbin sys test tmp userdata usr var
forlinx@ubuntu:~/work/OK3562-linux-source/buildroot/output/OK3562_Linux/images/rootfs$ sudo cp /mnt/hgfs/share/aarch64-buildroot-linux-gnu_sdk-buildroot.tar.gz ./
forlinx@ubuntu:~/work/OK3562-linux-source/buildroot/output/OK3562_Linux/images/rootfs$ cd ..
forlinx@ubuntu:~/work/OK3562-linux-source/buildroot/output/OK3562_Linux/images$ sudo umount rootfs

In summary, the file can be directly placed into the image generated by compilation.

Note: The default size of rootfs.ext2 is 1.7G. If you place files that are too large using this method, an error will occur: cp: Error writing './aarch64-buildroot-linux-gnu_sdk-buildroot.tar.gz': No space left on device. You can expand rootfs.ext2 using the following commands before placing files. Make sure to unmount rootfs.ext2 before executing these commands:

forlinx@ubuntu:~/work/OK3562-linux-source/buildroot/output/OK3562_Linux/images$ dd if=/dev/zero bs=1M count=0 seek=2000 of=rootfs.ext2 // This command does not write any data to rootfs.ext2; it only expands the file size to 2G.
0+0 write in
0+0 write out
0 bytes copied, 0.000348683 s, 0.0 kB/s
forlinx@ubuntu:~/work/OK3562-linux-source/buildroot/output/OK3562_Linux/images$ e2fsck -f rootfs.ext2
e2fsck 1.46.5 (30-Dec-2021)
Pass 1: Checking inodes, blocks, and sizes
Pass 2: Checking directory structure
Pass 3: Checking directory connectivity
Pass 4: Checking reference counts
Pass 5: Checking group summary information
rootfs: 9137/70128 files (0.1% non-contiguous), 249143/280320 blocks
forlinx@ubuntu:~/work/OK3562-linux-source/buildroot/output/OK3562_Linux/images$ resize2fs rootfs.ext2
resize2fs 1.46.5 (30-Dec-2021)
Resizing the filesystem on rootfs.ext2 to 512000 blocks (4k per block).
The filesystem on rootfs.ext2 is now 512000 blocks (4k per block).
forlinx@ubuntu:~/work/OK3562-linux-source/buildroot/output/OK3562_Linux/images$ ls -lh
Total 3.5G
drwxrwxr-x 2 forlinx forlinx 4.0K January 7 09:30 rootfs
-rw-r--r-- 1 forlinx forlinx 906M January 7 11:13 rootfs.cpio
-rw-r--r-- 1 forlinx forlinx 385M January 7 11:15 rootfs.cpio.gz
-rw-r--r-- 1 forlinx forlinx 2.0G January 7 11:21 rootfs.ext2
lrwxrwxrwx 1 forlinx forlinx 11 January 7 11:15 rootfs.ext4 -> rootfs.ext2
drwxrwxr-x 2 forlinx forlinx 4.0K January 7 10:02 rootfs_old
-rw-r--r-- 1 forlinx forlinx 383M January 7 11:15 rootfs.squashfs
-rw-r--r-- 1 forlinx forlinx 920M January 7 11:16 rootfs.tar
forlinx@ubuntu:~/work/OK3562-linux-source/buildroot/output/OK3562_Linux/images$ sudo mount rootfs.ext2 rootfs
forlinx@ubuntu:~/work/OK3562-linux-source/buildroot/output/OK3562_Linux/images$ cd rootfs/
forlinx@ubuntu:~/work/OK3562-linux-source/buildroot/output/OK3562_Linux/images/rootfs$ sudo cp /mnt/hgfs/share/aarch64-buildroot-linux-gnu_sdk-buildroot.tar.gz ./
forlinx@ubuntu:~/work/OK3562-linux-source/buildroot/output/OK3562_Linux/images/rootfs$ cd ..
forlinx@ubuntu:~/work/OK3562-linux-source/buildroot/output/OK3562_Linux/images$ sudo umount rootfs

2. Image Updates

forlinx@ubuntu:~/work/OK3562-linux-source$ ./build.sh updateimg

3. Development Board Verification

Development Board Verification

In summary, the test was successful.

Note: This method only takes effect for the current build. The modifications will be overwritten if the source code is recompiled, requiring the process to be repeated.

Join Us in Nuremberg

From March 10–12, 2026, NürnbergMesse will once again become the global meeting point for the embedded community. Forlinx Embedded invites you to join us on-site to explore industrial-grade embedded platforms and gain practical insights for your next embedded project.

What to Expect at Booth 3-561

• Explore Industrial-Grade Embedded Platforms
  Get hands-on with our latest SoMs, SBCs, and embedded computers built on leading silicon platforms from NXP, Texas Instruments, Rockchip, and Allwinner.
• Discover Real-World Edge AI & Industry Solutions
  Experience live demos showcasing cutting-edge solutions for Industrial Automation, Edge AI, IoT, Smart Medical, and Intelligent Transportation.
• Engage in Face-to-Face Technical Exchange
  Consult directly with Forlinx’s engineering experts to discuss system architecture, performance optimization, and long-term platform planning for your next product.

Exhibition Information

Opening Hours

Tuesday, 10.3.2026: 09:00 – 18:00

Wednesday, 11.3.2026: 09:00 – 18:00

Thursday, 12.3.2026: 09:00 – 17:00

Why embedded world 2026?

As the No. 1 global hub for the embedded community, embedded world brings together leading experts, silicon vendors, system integrators, and industry decision-makers from around the world.

Forlinx Embedded has participated in embedded world for three consecutive years, building deep experience and long-term partnerships across the ecosystem. We are committed to collaborating with industry partners, customers, and developers to explore the next frontier of embedded technology. Let’s drive industry progress together.

Request Your Free Visitor Ticket

Don’t miss out on the industry's premier event! Forlinx Embedded is offering a limited number of complimentary voucher codes for our partners and customers. Use the code below to secure your free entry and join us for a technical consultation.

Apply for Your Free SoM Kit

This article provides a detailed guide on successfully porting the Mobilenet_V3 model for handwritten digit recognition on the OKMX8MP development board under the Linux 5.4.70 environment. Through specific steps—including dataset import, model training, validation, and conversion to TensorFlow Lite format—this tutorial will help you efficiently implement image recognition tasks on embedded systems.

Copyright

All depictions of the eIQ® Toolkit, eIQ® Portal interface, and related trademarks appearing herein are the property of NXP B.V.

TensorFlow™ is a trademark owned by Google LLC.

This tutorial is intended solely for technical exchange and to demonstrate the AI inference capabilities of the OKMX8MP development board.

1. Import Dataset

Before model training, the dataset must be prepared. If no ready-to-use dataset is available, one may select *Import dataset* to choose from the tool's built-in example datasets. If a custom dataset is prepared, select *Create blank project* and import it directly, as shown in the figure below.

The dataset used in this article comes from the tool and is loaded via TensorFlow, as shown below.

From the dropdown menu in the top-left corner, you can select from various common TensorFlow datasets. This article uses the MNIST dataset, which includes 60,000 handwritten digits as the training set and 10,000 handwritten digits as the validation set. Furthermore, the tool provides three other optional datasets:

• cifar10: Color images of 10 classes, with 50,000 images as the training set and 10,000 images as the validation set.
• horses_or_humans: 2 classes—humans and horses. There are 1,027 human images and 1,027 horse images.
• tf_flowers: 5 classes, totaling 3,670 images of flowers.

In the top-left corner, there is also a Problem type dropdown menu for selecting the task type. The current version of the tool offers two types: Image Classification and Object Detection. For object detection tasks, only the coco/2017 dataset is currently provided, capable of detecting 80 types of objects, with 118,287 images as the training set, 5,000 images as the validation set, and 20,288 images as the test set.

After selecting the dataset, click the IMPORT button, choose a save directory, and wait for the import to complete, as illustrated below:

Select Save Directory

Waiting for Dataset Import

Once imported, you can view the MNIST dataset: the left panel displays category and quantity statistics for each image, while the right panel shows specific images from the dataset. Selecting an image allows you to view its details in the section below.

2. Model Training

After importing the dataset, the next step is to select a model. As shown in the figure below, click the SELECT MODEL button.

The model selection interface is shown below. The left side of this interface presents three different options with the following functions:

• RESTORE MODEL: Load the model used in the previous session.
• BASE MODELS: Select from the foundational models provided by the tool.
• Choose models created or imported by the user.

  The right side of the interface displays models for different task types, such as classification models, image segmentation models, and object detection models.

This article uses the foundational model provided by eIQ Portal, therefore BASE MODELS is selected, as shown in the figure below.

The following figure shows several foundational models provided by the tool. This article employs the lightweight mobilenet_v3 model. The detailed architecture of different models can be viewed using the MODEL TOOL function on the tool's main interface.

After selecting the model, the process proceeds to the training stage, with the interface shown below. The left side of the interface displays the key hyper parameters adjustable during training, including learning rate, batch size, and number of epochs. You can adjust these based on task requirements and hardware constraints. The right side of the interface is used to display relevant information during training, such as curves tracking the model's accuracy and loss values.

The parameter configuration used for this training is shown below. After configuration, click ''Start Training''.

The training process is as follows. You can intuitively view the model's accuracy and loss value on the right side.

The model training is completed as shown in the figure below. You can set different ranges to view the steps information.

3. Model Validation

After model training is completed, the model needs to be validated. Select VALIDATE to enter the model validation phase. As shown in the figure below.

The validation interface also requires setting parameters, including Softmax Threshold and some quantization parameters.

The parameters set in this document are as follows. After configuration, click Validate as shown below.

Then, the interface will display the model's confusion matrix and accuracy, as shown below.

4. Model Conversion

After training and validation, to run the model on OKMX8MP, it must be converted into a .tflite format file. Click DEPLOY to enter the conversion interface. As shown in the figure below.

In the left dropdown menu, select the export type. This document exports in TensorFlow Lite format. For lightweight deployment, both input and output data types are set to int8. The parameters are set as shown below.

After setting the parameters, select EXPORT MODEL to export the .tflite model, which can then be deployed to OKMX8MP.

5. Model Prediction

Before performing predictions, the following files need to be prepared:

• mobilen_v3.tflite
• Handwritten digit image files for prediction
• Python script for loading the model and image preprocessing

The .tflite file can be exported after model validation. Handwritten digit images can be selected from the dataset or manually created, then converted into 28x28 black-background white-digit images. This document uses the following 30 images for prediction, named in the format ''group_number_label'' As shown below.

Group 1:

Group 2:

Group 3:

Write the Python script.

import numpy as np
from PIL import Image
import tflite_runtime.interpreter as tflite
# ---------------- Configuration ----------------
MODEL_PATH = "/home/root/mobilenet_v3.tflite"
IMAGE_PATHS = [
"/home/root/1_0.jpg",
''/home/root/1_1.jpg",
''/home/root/1_2.jpg",
''/home/root/1_3.jpg",
''/home/root/1_4.jpg",
''/home/root/1_5.jpg",
''/home/root/1_3.jpg",
"/home/root/1_7.jpg",
''/home/root/1_8.jpg",
''/home/root/1_9.jpg",
"/home/root/2_0.jpg",
''/home/root/2_1.jpg",
''/home/root/2_2.jpg",
''/home/root/2_3.jpg",
''/home/root/2_4.jpg",
''/home/root/2_5.jpg",
''/home/root/2_3.jpg",
"/home/root/2_7.jpg",
''/home/root/2_8.jpg",
''/home/root/2_9.jpg",
"/home/root/3_0.jpg",
''/home/root/3_1.jpg",
''/home/root/3_2.jpg",
''/home/root/3_3.jpg",
''/home/root/3_4.jpg",
''/home/root/3_5.jpg",
''/home/root/3_3.jpg",
"/home/root/3_7.jpg",
''/home/root/3_8.jpg",
''/home/root/3_9.jpg",
]
# ---------------- Load Model ----------------
interpreter = tflite.Interpreter(model_path=MODEL_PATH)
interpreter.allocate_tensors()
input_details = interpreter.get_input_details()
output_details = interpreter.get_output_details()
# Model input information
input_shape = input_details[0]['shape'] # [1, H, W, C]
height, width, channels = input_shape[1], input_shape[2], input_shape[3]
input_dtype = input_details[0]['dtype'] # np.float32 或 np.int8
# Quantization parameter (if it is int8)
scale, zero_point = input_details[0]['quantization']
# ---------------- Prediction ----------------
for img_path in IMAGE_PATHS:
# Open the image and convert it to RGB (3 channels)
img = Image.open(img_path).convert('RGB')
img = img.resize((width, height))
# Convert to numpy array
img_array = np.array(img, dtype=np.float32)
# If the training data is white background with black text, it can be reversed.
#img_array = 255 - img_array
# Normalize to 0~1
img_array = img_array / 255.0
# Adjust the shape to [1, H, W, 3]
img_array = img_array.reshape(1, height, width, channels)
# If the model is quantized to int8, then convert
if input_dtype == np.int8:
img_array = img_array / scale + zero_point
img_array = np.round(img_array).astype(np.int8)
# Set input
interpreter.set_tensor(input_details[0]['index'], img_array)
# Inference
interpreter.invoke()
# Get output
output_data = interpreter.get_tensor(output_details[0]['index'])
predicted_label = np.argmax(output_data)
print(f"Image {img_path} prediction results: {predicted_label}")

Copy all three files into OKMX8MP, as shown below.

Enter the following command to run the prediction:

python3 demo.py

The output is as follows:

Based on the output results, it can be observed that the image 3_9.jpg has a true label of 9, but the model predicts it as 7. All other images are predicted correctly. The image 3_9.jpg is shown below:

From the prediction results, it can be concluded that the trained model achieves high accuracy and maintains good performance when deployed on OKMX8MP

In embedded systems and Linux development, boot time is a critical performance metric, especially when devices need to respond and operate quickly. The boot time directly impacts user experience and the market competitiveness of the device. Below are methods to reduce boot time on the Linux 5.10.198-based T536 platform:

Before:

Platform: T536, system: Linux 5.10.198, the original boot time is 14.50 seconds.

Specific Modification Methods:

1. Adjust Log Level

During system booting, a large amount of debug information is output by default. While this information is helpful for debugging, it prolongs the boot time. By setting the log level to 0, most unnecessary log outputs can be disabled, thereby speeding up the boot process.

2. Disable U-Boot Menu Wait

By default, U-Boot waits for user input to select the boot menu. By setting bootdelay to 0, this waiting time can be eliminated, allowing the system to boot directly.

diff --git a/device/config/chips/t536/configs/OKT536-C/buildroot/env.cfg b/device/config/chips/t536/configs/OKT536-C/buildroot/env.cfg
index fa2b7d37..db902cc4 100755
--- a/device/config/chips/t536/configs/OKT536-C/buildroot/env.cfg
+++ b/device/config/chips/t536/configs/OKT536-C/buildroot/env.cfg
@@ -8,7 +8,7 @@ mmc_root=/dev/mmcblk0p4
 nor_root=/dev/mtdblock1
 init=/init
 rdinit=/rdinit
-loglevel=8
+loglevel=0
 coherent_pool=16K
 #reserve_list=30M@64M,78M@128M,200M@512M
 mac=
@@ -34,7 +34,7 @@ boot_recovery=sunxi_flash read 0x4007f800 recovery;bootm 0x4007f800
 boot_fastboot=fastboot
 #uboot system env config
-bootdelay=1
+bootdelay=0
 #default bootcmd, will change at runtime according to key press
 #default nand boot
 #bootcmd=run setargs_nand boot_normal
diff --git a/device/config/chips/t536/configs/OKT536-C/sys_config.fex b/device/config/chips/t536/configs/OKT536-C/sys_config.fex
index 892bdaf7..c8e36d5c 100644
--- a/device/config/chips/t536/configs/OKT536-C/sys_config.fex
+++ b/device/config/chips/t536/configs/OKT536-C/sys_config.fex
@@ -4,7 +4,7 @@
 ; Description of GPIO format: Port: [Port number] + [Sequence number within the group]
 ;-----------------------------------------------------------------------------------------
 [platform]
-debug_mode = 1
+debug_mode = 0
 ;----------------------------------------------------------------------------------
 ;[target] system bootup configuration

3. Kernel Fast Boot Optimization

Adjustments were made to the configuration of kernel boot parameters, with modifications implemented in the random.c file. Optimizing RNG initialization logic decreases boot wait time without sacrificing security. Modifications:

diff --git a/linux-5.10-origin/drivers/char/random.c b/linux-5.10-origin/d
rivers/char/random.c
index b54481e66..df2b49008 100644
--- a/linux-5.10-origin/drivers/char/random.c
+++ b/linux-5.10-origin/drivers/char/random.c
@@ -79,7 +79,8 @@ static enum {
 CRNG_EARLY = 1, /* At least POOL_EARLY_BITS collected */
 CRNG_READY = 2 /* Fully initialized with POOL_READY_BITS collecte
d */
 } crng_init __read_mostly = CRNG_EMPTY;
-#define crng_ready() (likely(crng_init >= CRNG_READY))
+//#define crng_ready() (likely(crng_init >= CRNG_READY))
+#define crng_ready() (likely(crng_init > 0))
 /* Various types of waiters for crng_init->CRNG_READY transition. */
 static DECLARE_WAIT_QUEUE_HEAD(crng_init_wait);
 static struct fasync_struct *fasync;

4. System Service Boot Sequence Adjustment

Adjusting the service startup sequence can prevent non-critical services from delaying boot. The optimized system boot process enables more efficient initialization of critical services while minimizing the waiting time for non-critical ones. By this method, the boot time can be further reduced.

Effect After Modification

Optimizations in kernel configuration, boot parameters, log levels, and U-Boot settings reduced the T536 platform's boot time from 14.50 seconds to 7 seconds, improving both boot efficiency and user experience. Such improvements not only enhance the boot efficiency of the device but also significantly improve the user experience.

1. Overview

In embedded Linux product development, debugging, and delivery, crashes like segmentation faults and stack overflows are common. Serial logs alone often cannot pinpoint the exact failure scenario.

Core Dump is a crucial debugging mechanism provided by the Linux operating system: when a process terminates abnormally, the system saves the key runtime state of the process at the moment of the crash (including memory image, registers, call stack, etc.) into a file. Developers can use debugging tools like gdb to perform offline analysis on this file, enabling them to quickly identify the root cause of the issue.

This article uses the OK3568 platform (Linux Kernel 5.10 + Buildroot) as an example to provide a detailed explanation of how to enable Core Dump functionality and offers practical debugging methods, applicable to scenarios such as application development, system integration, and customer issue analysis.

2. Core Dump Concepts

Core Dump may be triggered when an application exits abnormally due to the following situations:

• Accessing illegal memory (Segmentation Fault)
• Null pointer or wild pointer access
• Stack overflow
• Illegal Instruction
• Program actively calling abort()

The generated core file is essentially a snapshot of the process’s address space at the moment of the crash, mainly including:

• The virtual memory content of the process (code segment, data segment, heap, stack)
• CPU register states
• Thread information
• Signal information (the type of signal that caused the crash)

With the core file, issues can be reproduced without the target board, significantly improving the efficiency of problem analysis.

3. OK3568 Buildroot System Default Operation Description

In the default Buildroot system for OK3568 (Linux kernel 5.10), core dump is disabled.

Core Dump default function is disabled.

When an application crashes, no core file is generated automatically.

To enable in-depth debugging or scenario reproduction, please manually enable this function.

4. Steps to Enable Core Dump

On the 3568 Linux 5.10 board, core dump is disabled by default.

To enable it on the board:

4.1 Create a core dump directory

It is recommended to save the core file under a persistent partition that the user can read and write, such as /userdata

mkdir -p /userdata/core

4.2 Set directory permissions

Allow any process to write to it during debugging:

chmod 777 /userdata/core

Note: For production systems, restrict permissions according to security policy. 777 is not recommended for long-term use.

4.3 Set core file directory

Configure the kernel to save cores with a descriptive name in the directory:

echo "/userdata/core/core.%e.%p" > /proc/sys/kernel/core_pattern

Parameter description:

%e：executable name

%p：process PID

Example generated file:

core.myapp.1234

4.4 Allow core dump generation

Lift the core dump size limit for the current shell:

ulimit -c unlimited

Note: This setting is session‑specific. To apply permanently, add the command to your startup script.

4.5 Verify if core dump is enabled

After enabling, use the ulimit -c command to check whether the dump feature is active.

If the output is 0, it indicates that the dump function is disabled.

If the output is unlimited, it indicates that the dump function is enabled.

5. Verify core dump generation

After completing the setup above, run your target application.

When the program crashes (e.g., due to a segmentation fault), a core file will be generated in the configured directory (/userdata/core/) with the following naming pattern:

core.<program_name>.<process_pid>

6. Debug with GDB

6.1 Basic debug command

Use a matching GDB (typically a cross‑debugger) on your host or target board:

gdb <program_path> <core_file_path>

Example:

gdb /userdata/myapp /userdata/core/core.myapp.1234

6.2 View the crash call stack

After entering GDB, input the following command:

bt

This command will print out the function call stack of the program at the time of the crash, which is the key basis for locating the problem.

6.3 Additional useful debug commands

List current threads:

info threads

Switch to the specified thread:

thread <id>

View variable values:

print <variable name>

View the current function source code:

list

7. Recommendations & Considerations

1. It is recommended to turn on -g when compiling with debug symbols, otherwise the call stack information is limited.

2. Note that the storage space may occupy a large amount of Core files. It is recommended to clean them regularly or limit the number of files generated.

3. Carefully open Core Dump in the production environment, which may contain sensitive information, and the formal product should decide whether to enable it according to the requirements.

4. Core Dump + log (syslog/application log) with the best log effect can restore the problem scenario more completely.

8. Summary

Enabling core dumps on the OK3568 Buildroot system preserves complete crash‑scene information when an application fails, significantly improving debugging and issue‑analysis efficiency. This mechanism is particularly useful for:

• Reproducing field‑reported issues
• Debugging sporadic crashes that cannot be reproduced in‑lab
• Analyzing multi‑threaded or complex‑logic failures

It is recommended to turn it on by default in the R & D and test stages, and make a choice in the mass production stage according to the safety and resource strategy.

Recently, Forlinx Embedded's FCU2601 embedded control unit successfully passed the rigorous assessment and testing by Bureau Veritas and obtained the EN 18031 cybersecurity certification!

This is not only an official certification of the safety performance of the industrial and commercial energy storage EMS energy control unit but also marks that Forlinx Embedded's technical strength in the field of cybersecurity has been internationally recognized.

What is EN 18031?

Simply put, EN 18031 is a harmonized cybersecurity standard that supports the EU's Radio Equipment Directive (RED, Directive 2014/53/EU). It serves as a core cybersecurity access requirement for electronic products in key international markets, including the EU and North America. This standard sets strict assessment indicators from multiple dimensions such as device safety design, vulnerability management, data protection, and system resilience. Only products that pass the tests can legally enter these high - threshold markets.

Nowadays, this certificate is no longer an ''extra bonus'' but a ''must - have pass'' for electronic products going global. Without it, even products with excellent performance will find it difficult to enter the international market. Forlinx Embedded's FCU2601 embedded control unit has now successfully achieved the EN 18031 cybersecurity certification. This milestone confirms that the product fully complies with the EU's stringent cybersecurity regulations and is ready to enter and compete in the global market.

Global Regulatory Upgrades

Why has the EN 18031 certification become a must - have for going global? Behind this is a broader surge in global cybersecurity regulatory upgrades.

With the increasing number of connected devices, ranging from smart home appliances to industrial control, from energy storage systems to critical infrastructure, while device interconnection brings convenience, it also significantly increases the risk of cyberattacks. The impact of cybersecurity incidents continues to deepen, affecting from personal privacy breaches to systemic paralysis and even industrial shutdowns.

Therefore, the European Union, North America and other major markets have tightened access rules, in addition to the EN 18031, IEC 62443 Industrial Network Security Standards, CRA Network Resilience Act and a series of regulations have landed or updated, forming a network security regulatory system covering the entire industrial chain.

Building a Multi-Layered Defense System with Core Technology

The successful EN 18031 certification of the FCU2601 embedded control unit is supported by Forlinx Embedded's forward-looking ''multi-layered defense technology system covering the entire product lifecycle,'' which includes:

• Firmware Trust Chain Establishment: Key hardening based on chip hardware and step-by-step firmware verification ensure that the firmware used during device startup is trusted and untampered.

• Secure Firmware OTA Updates: Encrypted transmission and verification mechanisms guarantee a secure upgrade process, providing technical support for secure updates throughout the device's lifecycle.

• System Security Access and Control: Strong password authentication and anti-brute-force mechanisms enable rigorous access control.

• Network Protection and Port Management: Following the principle of minimizing the attack surface, only necessary network service ports are open, with default protection policies configured. Port information is also included in the product manual.

• Secure Communication and Storage: Leveraging the HSM hardware security module to ensure data confidentiality and integrity, enhancing overall communication security.

• CVE Vulnerability Scanning and Remediation: Continuous monitoring of global vulnerability databases, proactive scanning, assessment, and remediation of software components used in the product, forming a closed-loop vulnerability management process.

Escorting Customers and Expanding into the Global Market

The FCU2601 embedded control unit combines high performance, multiple interfaces, and low power consumption, making it widely suitable for local energy management applications in various energy storage systems. The product has been comprehensively optimized in hardware, security protection, certification support, and software adaptation to meet the diverse needs of the energy storage industry, ensuring excellent applicability, stability, and reliability.

Notably, the FCU2601 has initiated the certification process based on IEC 62443—the core standard for industrial automation and control systems cybersecurity—and is expected to complete all certifications soon.

Passing the EN 18031 certification marks a key step for Forlinx Embedded in the security landscape of commercial and industrial energy storage EMS applications. In response to tightening global cybersecurity regulations, Forlinx Embedded will further enhance its security technology framework. This commitment ensures customers receive comprehensive, lifecycle security protection, strengthens the foundational security of energy storage EMS products, helps them navigate compliance challenges, and supports their global expansion with certified reliability.

Recently, Forlinx Embedded has been granted the "2025 Annual Outstanding Contribution Award" by Rockchip Electronics Co., Ltd., recognizing their profound collaboration and remarkable achievements in partnership. This distinction not only underscores Rockchip's high recognition of the strategic accomplishments made over the past year but also highlights Forlinx Embedded's essential role in product research and development, industry applications, and ecosystem co-construction—thereby establishing a robust groundwork for further deepened cooperation.

Since partnering, Forlinx Embedded and Rockchip have achieved significant progress in product innovation and implementations. Utilizing Rockchip platforms such as the RK3588, RK3576, RV1126B, RK3568, RK3562, RK3506, and RK3399, Forlinx Embedded has launched a range of SoMs, development boards, and industrial computers, earning strong market feedback.

Looking forward, Forlinx Embedded will deepen its strategic collaboration with Rockchip, focusing on technological innovation, product iteration, and joint market expansion. Together, they will drive intelligent, high-quality growth across industries including industrial control, smart transportation, power and energy, and smart healthcare—contributing to a secure and reliable embedded ecosystem.

In the industrial automation, achieving microsecond-level hard real-time control on general-purpose Linux systems has always been a key challenge for high-precision applications such as robotics and multi-axis motion control. The open-source IgH EtherCAT Master protocol stack, with its exceptional high real-time performance and low jitter characteristics, serves as a critical bridge connecting industrial fieldbus networks to upper-layer applications. However, unlocking its full potential relies on the robust support of the Preempt-RT real-time kernel.

Based on the Forlinx Embedded OK3576-C development board, this article demonstrates microsecond-level communication jitter control under CPU-isolated cores and full-load stress. Through comparative tests of 1ms synchronous speed mode and 125µs synchronous torque mode, it presents a practical, high-performance real-time industrial control solution.

Its Performance is Impressive!

In cycle synchronous velocity mode, cycle jitter was reduced from 6.3080 μs to 3.5790 μs.

In cycle synchronous torque mode, cycle jitter was reduced from 50.0470 μs to 2.1130 μs!

01 What is IgH EtherCAT Master?

Before answering this, let's first understand: What is EtherCAT? EtherCAT is one of the fastest-growing industrial Ethernet protocols. It adopts a hardware-driven architecture and offers multiple advantages including high speed, large data transmission capacity, long transmission distance, short update cycles, and support for a large number of connected devices.

IgH EtherCAT is an open-source EtherCAT master running on Linux systems. It creates a Linux character device, allowing applications to communicate with the EtherCAT master module through this interface.

It has three parts:

1. Master Module

Acts as the ''brain'' and core of the EtherCAT master.

Manages EtherCAT bus communication and handles data exchange and synchronization between master and slaves. Provides interfaces for both low‑level drivers and upper‑layer applications.

2. Device Modules

Real‑time optimized Ethernet drivers (e.g., stmmac for Rockchip RK platforms).

Bridge between the master and physical network ports. Intelligently separates traffic: selected devices handle EtherCAT frames; others operate as regular Ethernet devices, enabling EtherCAT and standard networking to run in parallel.

3. Application

Executes user‑defined logic.

Requests bus control from the master via API. Once granted, configures the bus and performs cyclic process‑data exchange. Can be implemented as a kernel module or a user‑space program using EtherCAT/RTDM libraries.

Contact us to obtain the official IgH EtherCAT Master source code and technical manual.

02 Real‑Time Kernel: Preempt‑RT

1. Key Advantages:

To ensure high real‑time performance, IgH EtherCAT Master must run on a real‑time operating system. Preempt‑RT is a Linux kernel optimized for real‑time performance, offering clear advantages over standard Linux:

① Hard Real‑Time Guarantee:

Provides deterministic task completion within strict deadlines, unaffected by other tasks.
Essential for time‑critical applications such as industrial automation and aerospace.

② Efficient Scheduling & Low Latency:

Employs priority‑based preemptive scheduling, allowing high‑priority tasks to immediately preempt lower‑priority ones.
Deeply optimizes interrupt handling to drastically reduce response times and eliminate system jitter.

③ High‑Precision Timing:

Delivers microsecond‑level kernel timer accuracy.
Supports real‑time extensions and kernel customization to meet precise cyclic communication requirements of EtherCAT.

2. Real‑Time Performance Testing

This test references the Rockchip RealTime Linux Performance Test Report and is divided into idle-load testing and stress testing. Test Environment:

① Tool: cyclictest

② Hardware Platform: OK3576-C Development Board

③ Kernel Version: 6.1.118-rt36

④ Path：SDK/docs/rk35xx/Patches/Real-Time-Performance/PREEMPT_RT/kernel-6.1/kernel-6.1.118

a. For configuring the Preempt‑RT kernel, refer to the user manual:
/1-manual/OK35xx-Linux6.1.118-configuring real-time kernel method.pdf

b. For real‑time performance test results on different hardware platforms, refer to:
/1-manual/OK35xx-Linux6.1.118-real-time test.pdf

3. Idle‑Load Test:

cyclictest -c 0 -m -t 8 -p99 -D12H

Parameter Details:
-c 0: Selects clock source CLOCK_MONOTONIC
-m: Locks memory to prevent swapping to disk
-t 8: Creates 8 test threads
-p 99: Sets thread priority to 99
-D 12H: Sets test duration to 12 hours

4. Stress Test:

stress-ng -c8 --io 8 --cpu-load 100 -vm 4 --vm-bytes 512M --timeout 10000000s &

Parameter Details:
-c 8: Simulates 8 CPU cores running at full load
--io 8: Simulates disk I/O pressure
--cpu‑load 100: Sets target CPU load to 100%
-vm 4 --vm‑bytes 512M: Simulates memory pressure
--timeout 10000000s: Sets test duration to 10,000,000 seconds

03 Demo Case

This demonstration uses the Cycle Synchronous Velocity (CSV) mode (communication cycle: 1 ms) and the Cycle Synchronous Torque (CST) mode (communication cycle: 125 μs) to drive a servo motor.

1. Environment Setup

Development Environment:

Kernel：6.1.118-rt36
IgH EtherCAT Master：IgH EtherCAT master 1.6.0-rc1
EtherCAT Master：OK3576-C
EtherCAT Slave：
（1）EtherCAT Coupler: EK1100
（2）Digital Output Module: EL2008
（3）Servo Drive: IS620NS1R6I+Servo Motor: MS1H1‑10B30CB‑A330Z

Topology Diagram:

The master connects via Ethernet cable to the EtherCAT coupler EK1100. EK1100 connects via E‑Bus to the digital output module EL2008, and via Ethernet cable to the servo drive IS620N. The AC servo motor MS1H1‑10B30CB is connected to the servo drive IS620N via power and encoder cables.

Use the EtherCat debugging tool to output the identified slaves:

Use the EtherCat debugging tool to output the bus topology:

2. Servo Modes

The IS620N supports 7 servo modes: Profile Position (PP), Profile Velocity (PV), Profile Torque (PT), Homing (HM), Cyclic Synchronous Position (CSP), Cyclic Synchronous Velocity (CSV), Cyclic Synchronous Torque (CST).

Each mode supports different communication cycle times as shown below:

3. Master Performance Test Method

Reference for the following definitions: Definitions of Jitter and Latency

Refer to the official example code: examples/dc_user/main.c · stable-1.5

This code implements the statistical collection of the maximum and minimum time spent per communication cycle. It cyclically prints the maximum and minimum EtherCAT communication cycle times within the interval, with a 1-second printing period.

Demo 1: Cyclic Synchronous Velocity Mode (1 ms)

In Cyclic Synchronous Velocity mode, the upper-level controller periodically sends the pre-calculated target velocity (60FF) to the servo drive. Velocity and torque regulation are executed internally by the servo.

Basic Configuration:

PDO information output via EtherCAT debugging tool:

Operation Steps:

1. Set the mode: Write 09h to object 6060h to select Cyclic Synchronous Velocity Mode.

2. Set target velocity: Write 0 to object 60FFh (target velocity). Reason: In velocity mode, the servo motor starts rotating immediately upon entering Servo On state (Step 3). Setting the velocity to 0 ensures the motor remains at 0 RPM and does not move when Servo On is activated.

3. Set control command: Write to object 6040h (Control Word) following these sub-steps. Note: Steps 3.1 and 3.2 are performed to transition the drive's state machine into the ready state.

4. Write the desired target velocity value to object 60FFh.

Performance Indicators:

① Stress Test (6 hours)

stress -c 4 --io 2 --vm 1 --vm-bytes 256M --timeout 1000000s&
./igh_ethercat_motor_csv

② Isolation Test + CPU (6 hours)

stress -c 4 --io 2 --vm 1 --vm-bytes 256M --timeout 1000000s &
taskset -c 7 ./igh_ethercat_motor_csv

Demo 2: Cyclic Synchronous Torque Mode (125µs)

In this mode, the upper-level controller periodically sends the pre-calculated target torque (object 6071h) to the servo drive. Torque regulation is executed internally by the servo. When the speed reaches the limit value, the system will enter the speed regulation phase.

Basic Configuration:

PDO information output via EtherCAT debugging tool:

Operation Steps:

Step 1: Set Mode - Set object 6060h to 0Ah to select Cyclic Synchronous Torque Mode.

Step 2: Set Target Torque - Set object 6071h to 0 (zero torque). Reason: In torque mode, the target torque takes effect immediately upon entering Servo On state (Step 3). Setting torque to zero ensures safety during initialization.

3. Set control command: Write to object 6040h (Control Word) following these sub-steps. Note: Steps 3.1 and 3.2 are performed to transition the drive's state machine into the ready state.

Step 4: Set the target torque OD 6071h.

Performance Indicators:

① Stress Test (6 hours)

stress -c 4 --io 2 --vm 1 --vm-bytes 256M --timeout 1000000s&
./igh_ethercat_motor_cst

② Pressure Test + CPU (6 hours)

stress -c 4 --io 2 --vm 1 --vm-bytes 256M --timeout 1000000s &
taskset -c 7 ./igh_ethercat_motor_cst

In the performance tests described above, data frames that were not received within the expected cycle time were excluded from the period statistics. This situation occurs more frequently when running the 125 µs cycle mode.

For both demonstration modes, the application was configured with FIFO scheduling and memory locking. The system's cycle jitter was significantly reduced when employing the CPU isolation (pinning) strategy.

In cycle synchronous velocity mode, cycle jitter was reduced from 6.3080 μs to 3.5790 μs.

In cycle synchronous torque mode, cycle jitter was reduced from 50.0470 μs to 2.1130 μs.

Training Your Own YOLOv5 Model

1. Environment Preparation

1.1 Install the Required Software

The following steps are performed in a Windows 11 environment:

Required Software:
Anaconda (Python virtual environment management tool)
Git (to clone the YOLO source code)
PyCharm (Python IDE)

Anaconda Installation:

https://blog.csdn.net/Natsuago/article/details/143081283?spm=1001.2014.3001.5501

PyCharm Installation:

Git Installation: https://blog.csdn.net/weixin_45811256/article/details/130925392

1.2 Clone YOLO Repository

Navigate to the directory where you want to store YOLO on your Windows system, open the Command Prompt (cmd), and enter the following command to clone the repository:

git clone https://github.com/ultralytics/yolov5

1.3 Set Up a Virtual Python Environment and Install Dependencies

conda create -n gityolov5 python=3.8 -y //It is strongly recommended to use Python 3.8, as other versions may cause errors.

Install Dependencies: Navigate to the YOLO directory and activate the Python 3.8 virtual environment.

J:\yolov5>conda activate gityolov5 //Enter the environment just created
(gityolov5) J:\yolov5>pip install -r requirements.txt -i https://mirrors.huaweicloud.com/repository/pypi/simple //Install required dependencies

Setup is complete. Now test if it runs successfully:

Open the downloaded yolov5 folder in PyCharm.

Open Settings and add a Python interpreter.

Note: It's usually under the directory where Conda is installed, or specifically under the envs folder of that path, containing the name of the virtual environment you created:

Open the train.py file and click ''Run''

If you see results similar to the example image you have, the environment is successfully installed.

2. Dataset Preparation

Due to version compatibility issues, it is recommended to install a new Python 3.9 environment specifically for this step ( other versions may have conflicts; Python 3.9 is strongly recommended).

J:\yolov5>conda create -n label python=3.9 -y
J:\yolov5>conda activate label
(label) J:\yolov5>pip install labelimg -i https://mirrors.huaweicloud.com/repository/pypi/simple
(label) J:\yolov5>labelimg

The labeling tool LabelImg is now ready：

The following task involves labeling the material images and storing them.

Create the following directory:

datasets -> (Project name, e.g., ''bike'' used here)

There are two folders under both the images and label directories. They are train and val. Train stores resources used for training, and Val stores resources used for validation. You can think of train as practice questions and Val as exam papers.

Images stores picture files, and labels stores annotation information. The labels are txt files containing coordinates.

The following is the annotation process:

C:\Users\2020>conda activate label
(label) C:\Users\2020>labelimg //Open the annotation tool

For the training set (train): Open the directory containing the training images.

Open the directory for saving the training annotation files.

First, ensure the format is set to YOLO.
Then, click "Create RectBox" to draw a bounding box around the target object. Finally, set the object label.

Press Ctrl + S to save the annotation, then click the next image in the list at the bottom right corner. Repeat this process for all images. label

The annotation process for the Val (validation) set is the same.

Train the model

Create a configuration file in the yolov5/data directory.

# Train/val/test sets as 1) dir: path/to/imgs, 2) file: path/to/imgs.txt, or 3) list: [path/to/imgs1, path/to/imgs2, ..]
path: J:\yolov5\datasets\bike2 # dataset root dir
train: images/train # train images (relative to 'path')
val: images/val # val images (relative to 'path')
test: # test images (optional)
# Classes
nc: 1 # number of classes
names: ['bike'] # class names

Download YOLOv5 Pretrained Model:

https://github.com/ultralytics/yolov5/releases

Edit Configuration:

In the red box, add the following:

--weights yolov5s.pt --data data/bike.yaml --workers 1 --batch-size 8

Click "Run" to start training.

Output Location:

The model will be saved at exp3/weights/best.pt.

Manual Verification:

Place the best.pt file into the yolov5 folder.

J:\yolov5>conda activate rknnyolo
(rknnyolo) J:\yolov5>python detect.py --weights best.pt --source datasets/bike2/images/train

detect: weights=['best.pt'], source=datasets/bike2/images/train, data=data\coco128.yaml, imgsz=[640, 640], conf_thres=0.25, iou_thres=0.45, max_det=1000, device=, view_img=False, save_txt=False, save_format=0, save_csv=False, save_conf=False, save_crop=False, nosave=False, classes=None, agnostic_nms=False, augment=False, visualize=False, update=False, project=runs\detect, name=exp, exist_ok=False, line_thickness=3, hide_labels=False, hide_conf=False, half=False, dnn=False, vid_stride=1
YOLOv5 v7.0-418-ga493afe1 Python-3.8.20 torch-2.4.1+cpu CPU
Fusing layers... 
Model summary: 157 layers, 7012822 parameters, 0 gradients, 15.8 GFLOPs
image 1/97 J:\yolov5\datasets\bike2\images\train\001.jpg: 384x640 1 bike, 59.2ms
image 2/97 J:\yolov5\datasets\bike2\images\train\002.jpg: 384x640 1 bike, 51.2ms
image 3/97 J:\yolov5\datasets\bike2\images\train\003.jpg: 384x640 1 bike, 52.3ms
image 4/97 J:\yolov5\datasets\bike2\images\train\004.jpg: 384x640 1 bike, 56.6ms

Test Results:

II. Deploy and Convert Model to RKNN

Use the following command to convert .pt to .onnx:

Modify the file:

Modify the file:

(gityolov5) J:\yolov5>pip install onnx==1.13 -i https://mirrors.huaweicloud.com/repository/pypi/simple
(gityolov5) J:\yolov5>python export.py --weights best.pt --img 640 --batch 1 --include onnx

Make the necessary modifications in the configuration file.

ubuntu22.04：

Install anaconda：

forlinx@ok3568:~$ sudo apt install libgl1-mesa-glx libegl1-mesa libxrandr2 libxrandr2 libxss1 libxcursor1 libxcomposite1 libasound2 libxi6 libxtst6
forlinx@ok3568:~$ sudo apt update
forlinx@ok3568:~$ wget https://repo.anaconda.com/archive/Anaconda3-2024.10-1-Linux-x86_64.sh
forlinx@ok3568:~$ bash Anaconda3-2024.10-1-Linux-x86_64.sh
Welcome to Anaconda3 2024.10-1
In order to continue the installation process, please review the license agreement.
Please, press ENTER to continue
>>> //Press Enter, and there will be many messages printed. Press 'q' to exit and view them.
Do you accept the license terms? [yes|no]
>>> yes //Enter yes to agree to the terms after exit
Anaconda3 will now be installed into this location: //Press Enter again
/home/forlinx/anaconda3
forlinx@ok3568:~/anaconda3/bin$ export PATH=~/anaconda3/bin:$PATH
forlinx@ok3568:~/anaconda3/bin$ source ~/anaconda3/bin/activate
(base) forlinx@ok3568:~/anaconda3/bin$ source ~/.bashrc
(base) forlinx@ubuntu22:~/anaconda3/bin$ conda create -n rknn python=3.8 //Or create a python 3.8 virtual environment
(base) forlinx@ubuntu22:~/anaconda3/bin$ conda activate rknn

Download and deploy the rknn related repository

(rknn) forlinx@ok3568:~$git clone https://github.com/airockchip/rknn-toolkit2.git --depth 1
(rknn) forlinx@ubuntu22:~/rknn-toolkit2/rknn-toolkit2/packages/x86_64$ pip install rknn_toolkit2-2.3.2-cp38-cp38-manylinux_2_17_x86_64.manylinux2014_x86_64.whl -r -i https://mirrors.huaweicloud.com/repository/pypi/simple

Conversion:

To modify a file test. py:

(rknn) forlinx@ubuntu22:~/rknn-toolkit2/rknn-toolkit2/examples/onnx/yolov5$ vi test.py
import os
import urllib
import traceback
import time
import sys
import numpy as np
import cv2
from rknn.api import RKNN
# Model from https://github.com/airockchip/rknn_model_zoo
ONNX_MODEL = 'best.onnx' //onnx model
RKNN_MODEL = 'best.rknn' //Generate rknn model
IMG_PATH = './test.jpg' //Test the image path
DATASET = './dataset.txt'
QUANTIZE_ON = True
OBJ_THRESH = 0.25
NMS_THRESH = 0.45
IMG_SIZE = 640
CLASSES = ("bike") //Label
if __name__ == '__main__':
# Create RKNN object
rknn = RKNN(verbose=True)
# pre-process config
print('--> Config model')
rknn.config(mean_values=[[0, 0, 0]], std_values=[[255, 255, 255]], target_platform='rk3568')
print('done')
# Load ONNX model
print('--> Loading model')
ret = rknn.load_onnx(model=ONNX_MODEL)
if ret != 0:
print('Load model failed!')
exit(ret)
print('done')
# Build model
print('--> Building model')
ret = rknn.build(do_quantization=QUANTIZE_ON, dataset=DATASET)
if ret != 0:
print('Build model failed!')
exit(ret)
print('done')
# Export RKNN model
print('--> Export rknn model')
ret = rknn.export_rknn(RKNN_MODEL)

(rknn) forlinx@ubuntu22:~/rknn-toolkit2/rknn-toolkit2/examples/onnx/yolov5$ python test.py
I rknn-toolkit2 version: 2.3.2
--> Config model
done
--> Loading model
I Loading : 100%|██████████████████████████████████████████████| 120/120 [00:00<00:00, 19261.28it/s]
done
--> Building model
D base_optimize ...
D base_optimize done.
D fold_constant ...
D fold_constant done.
D correct_ops ...
D correct_ops done.
Conversion completed, and best.rknn is generated in the current directory.

III. Deployment of the Development Board Runtime Environment:

forlinx@ok3568:~$sudo apt update
forlinx@ok3568:~$sudo apt install git cmake
forlinx@ok3568:~$git clone https://bgithub.xyz/rockchip-linux/rknpu2.git

Modify the file to change the label to bike only

forlinx@ok3568:~/rknpu2/examples/rknn_yolov5_demo$ vi model/coco_80_labels_list.txt

Modify this file and set the number of detection targets to one.

forlinx@ok3568:~/rknpu2/examples/rknn_yolov5_demo$ vi include/postprocess.h

forlinx@ok3568:~/rknpu2/examples/rknn_yolov5_demo$ bash build-linux_RK3566_RK3568.sh

At this point, the environment setup is complete.

Copy the images for inference and the RKNN model to the development board. Execute the following command: An out.jpg file will be generated in the current directory.

forlinx@ok3568:~/rknpu2/examples/rknn_yolov5_demo/install/rknn_yolov5_demo_Linux$ ./rknn_yolov5_demo best.rknn train/006.jpg

With the rapid advancement of edge AI and intelligent vision applications, NPU-powered on-device object detection is progressively emerging as a core capability across industrial vision, security surveillance, smart devices, and other related fields. YOLOv8, currently one of the leading real-time object detection algorithms, achieves an excellent trade-off between accuracy and speed, and has been widely adopted in various embedded AI platforms.

This guide is based on the Forlinx Embedded OK3576-C development board—which features the Rockchip RK3576 processor with a built-in NPU—and demonstrates the complete process of converting official pre-trained YOLOv8 models from PyTorch format to RKNN format, followed by deploying the model on-board and performing real-time object detection inference using a USB camera. The focus is placed on the end-to-end workflow of model conversion, deployment, and inference, without covering model training or algorithm tuning. The aim is to help developers quickly complete the full engineering pipeline from ''model to edge application''.

1. Preparation

1.1 Hardware

1. UVC-compliant USB camera

2. OK3576-C development board

3. MIPI or HDMI display

1.2 Software Environment

1. PC (virtual machine): Ubuntu 22.04

2. OK3576-C board OS: Forlinx Desktop 24.04

3. PC side: RKNN Toolkit 2-2.3.2 (please refer to the environment setup guide for details)

4. Board side: RKNN Toolkit 2-Lite 2 (please refer to the environment setup guide for details)

1.3 Required Files

1. Rockchip-modified YOLOv8 source code

（The yolov10 model uses the source code: ultralytics_yolov10-main.zip ）

（The yolo11 model uses the source code: ultralytics_yolo11-main.zip ）

1. Conversion code officially provided by RK: rknn_model_zoo.zip

2. On-Board Inference Code rknn-yolo.zip

2. Model Download

Download the YOLOv8 series models from GitHub at the following address:

https://github.com/ultralytics/assets/releases

Upon accessing the webpage, locate the ''Assets'' section, expand all contents as shown in Figure 2.1, and select the corresponding model. This article uses the yolov8n.pt file as an example. (If unable to download, refer to the attachment.) yolov8n.pt

Figure 2.1 Pre-trained Model Download Page

3. Model Conversion

Conversion process: .pt → .onnx → .rknn

3.1 Convert .pt to .onnx

(1) Navigate into the Rockchip-modified YOLOv8 source code directory (ultralytics_yolov8-main) and place the downloaded .pt file there. In this article, the .pt file is placed in a directory at the same level as ultralytics, as shown in Figure 3.1.

Figure 3.1 Location of the .pt file

(2) Create a conversion script named pt2onnx.py with the following content:

from ultralytics import YOLO
if __name__ == "__main__":
model = YOLO(r"yolov8n.pt") #Path to the .pt file
model.export(format="rknn")

Note: The format parameter must be set to "rknn". The output detection head differs when specifying "onnx" versus "rknn".

(3) Run the script

python pt2onnx.py

The converted .onnx file will be generated in the same directory as the .pt file. A successful conversion log is shown in Figure 3.2. The output shape must consist of nine detection heads, and the resulting .onnx file size should not be too small. A small size indicates an incomplete conversion.

Figure 3.2 Successful pt2onnx Conversion Log

3.2 Convert .onnx to .rknn

(1) Locate the rknn_model_zoo file provided by Rockchip and copy the converted .onnx file to the following path:

cp /ultralytics_yolov8-main/yolov8n.onnx /rknn_model_zoo/examples/yolov8/model

(2) Navigate to the specified path and run the convert.py script:

cd /rknn_model_zoo/examples/yolov8/python
python convert.py ../model/yolov8n.onnx rk3576 i8 ../model/yolov8n.rknn

Figure 3.3 Successful onnx2rknn Conversion Log

4. Model Inference

(1) Locate the on-board inference directory rknn-yolo. Copy the converted .rknn file to the /rknn-yolo/rknnModel directory.

(2) Modify the main.py file to point to the path of the .rknn model as shown in the example.

(3) Connect the hardware devices and run main.py to perform inference:

python main.py

5. Recognition Results

YOLOv8 achieves an average frame rate of approximately 30 FPS for real-time object detection using a camera on the RK3576 board. The recognition effect is shown in Figure 5.1, and the real-time frame rate is displayed in Figure 5.2.

Figure 5.1 Recognition Result

Figure 5.2 Average Frame Rate per 30 Frames from the Camera

Through the steps outlined above, the YOLOv8 model has been successfully converted from .pt to .onnx and finally to .rknn on the OK3576 platform. Leveraging the built-in NPU of the RK3576 processor, real-time object detection inference using a USB camera has been implemented. Under the current test conditions, the YOLOv8n model consistently achieves real-time processing performance of approximately 30 FPS. This validates the strong computational power and energy efficiency of the RK3576 for edge AI vision applications.

As 2026 unfolds, intelligent transformation is entering a critical phase. Across industries—from industrial inspection and smart transportation to consumer electronics and medical devices—demand for AI performance, reliability, and adaptability continues to grow. Embedded AI boards are now central to this evolution, serving as the essential ''intelligence hub'' in modern devices.

Built on years of engineering excellence, Forlinx Embedded delivers a full AI board portfolio offering 0.5 to 32 TOPS of compute power, ready for both industrial and consumer applications. From heavy-duty model inference to lightweight edge AI, Forlinx provides tailored, cost-efficient solutions for every need. This guide highlights the key strengths and real-world applications of Forlinx's AI lineup—helping you choose the right technology for your 2026 projects and stay ahead in the AI era.

Future-Ready AI Computing: High-Performance Servers & Edge Flagships

For applications demanding intensive data processing and complex AI model execution, Forlinx Embedded delivers solutions with exceptional computing power and scalability.

FCU3501 AI Edge Computing Box

Scalable 32 TOPS Edge AI Terminal

The FCU3501 marks our evolution from core modules to complete solutions. This ''All-in-One AI Edge Computing Device,'' powered by the RK3588J processor, is a pre-integrated, out-of-the-box platform for deploying intelligence at the edge.

Key Specs & Hardware Analysis:

• AI Computing Power: Based on the RK3588J processor with a built-in 6TOPS NPU;

• Expandable via M.2 M-Key interface with high-performance AI accelerator cards, boosting total system AI performance up to 32TOPS;

• Processor Architecture: 4 × Cortex-A76 + 4 × Cortex-A55, max frequency up to 1.6GHz;

• Video Processing: 8K@60fps video decoding and 8K@30fps encoding.

Interfaces & Expansion:

• Dual Gigabit Ethernet ports (expandable to 10GbE), multiple USB 3.0/2.0 ports, HDMI output, and rich RS232/485 serial ports;

• Built-in SATA interface and M.2 slot;

FET3588-C SoM

The All-Round Flagship, Redefining Intelligence to New Heights

The FET3588-C SoM is the performance benchmark of Forlinx Embedded's AI product line. It fully unleashes the potential of the Rockchip RK3588 chip, providing an exceptionally powerful hardware platform for high-end AIoT applications.

Key Specs & Hardware Analysis:

• AI Computing Power: Integrates a 6 TOPS NPU supporting multiple precision computations;

• Processor Architecture: 4 × Cortex-A76 @ 2.4GHz + 4 × Cortex-A55 @ 1.8GHz;

• Graphics & Video: Built-in ARM Mali-G610 MP4 GPU supporting 8K@60fps display output.

Interfaces & Expansion:

• Multimedia Interfaces: Dual HDMI 2.1 outputs, dual-channel MIPI DSI, etc;

• High-Speed Data Interfaces: Dual-channel PCIe 3.0, USB 3.1, etc;

FET3576-C SoM

High-Integration 6 TOPS Intelligent Core

Based on the RK3576 processor, the FET3576-C SoM delivers AI computing power on par with the FET3588-C while achieving outstanding optimization in system integration, power efficiency, and industrial-grade features.

Key Specs & Hardware Analysis:

• AI Computing Power: 6 TOPS NPU with excellent power efficiency;

• Processor Architecture: 4 × Cortex-A72 @ 2.2GHz + 4 × Cortex-A53 @ 2.0GHz;

• Exclusive Feature: Supports Firewall hardware resource isolation technology.

Interfaces & Expansion:

• Display Interfaces: Dual MIPI DSI and HDMI 2.1;

• High-Speed Interconnect: PCIe 2.0, USB 2.0, Dual Gigabit Ethernet.

Mainstream Mid-Range: 0.5-3 TOPS Computing Power for a Wide Spectrum of Intelligent Needs

This is the area with the strongest market demand and the most extensive application scenarios, and Forlinx Embedded provides a number of products.

FET1126Bx-S SoM

The More Ideal AI Vision Core

The widespread appeal of Rockchip's RV1126B series processor lies not in "far ahead" specifications, but in its precise alignment with the essential requirements of diverse edge AI scenarios, paving a more efficient and balanced pathway for industrial deployment.

Key Specs & Hardware Analysis:

• AI Computing Power: Integrated 3 TOPS NPU for accelerating lightweight AI applications;

• Processor Architecture: Quad-core Cortex-A53;

• AI-ISP: Does not occupy NPU resources, offering more bandwidth and power efficiency compared to traditional ISP+NPU co-processing schemes.

Interfaces & Expansion:

• Industrial Buses: Comprehensive support for CAN-FD, UART, SPI, I2C, PWM, ADC, etc;

• Compatibility: Compatible with Raspberry Pi 40Pin GPIO for rapid onboarding;

• Expandability: Provides PCIe 2.0 interface, supporting Wi-Fi and 4G/5G module expansion to enhance communication capabilities.

FETMX8MP-C SoM

Industrial AI Core for Machine Vision

Designed around the NXP i.MX 8M Plus Quad processor, this core board excels in power efficiency, real-time performance, and precision for industrial machine vision.

Key Specs & Hardware Analysis:

• AI Computing Power: Integrated 2.3 TOPS NPU, optimized for visual inference;

• Processor Architecture: 4 × Cortex-A53 + 1 × Cortex-M7 ensuring real-time response.

• Image Signal Processor: Built-in ISP supporting up to 12MP resolution.

Interfaces & Expansion:

• Camera Interfaces: Dual MIPI-CSI;

• Industrial Networking: Dual Gigabit Ethernet with support for IEEE 1588 Precision Time Protocol (TSN);

FET536-C SoM

Versatile Mainstay for Industrial AI

The FET536-C is a precisely positioned, comprehensive-interface mainstream industrial AI SoM based on the Allwinner T536 processor, achieving a perfect balance between general-purpose computing, AI performance, and industrial connectivity.

Key Specs & Hardware Analysis:

• AI Computing Power: Integrated 2 TOPS NPU, meeting most industrial inspection needs;

• Processor Architecture: Quad-core Cortex-A55 @ 1.6GHz;

• Strong Real-Time Capability: Built-in independent RISC-V @ 600MHz co-processor.

Interfaces & Expansion:

• Robust Networking & Buses: Dual Gigabit Ethernet and quadruple CAN-FD buses;

• High-Speed Expansion: PCIe 2.1 and USB 3.0;

FET527N-C SoM

Cost-Effective AI Choice

Designed based on the Allwinner T527 series high-performance processor, it can empower your AI applications. Board-to-board connection with a pluggable design for easy product installation and maintenance.

Key Specs & Hardware Analysis:

• AI Computing Power: Integrated 2 TOPS NPU, supporting mainstream model frameworks;

• Processor Architecture: 8 × high-performance ARM Cortex-A55 cores, plus built-in RISC-V and DSP cores;

• High Integration: Compact size with integrated core functions.

Interfaces & Expansion:

• Gigabit Ethernet, USB, multiple UARTs, CAN bus, and other interfaces;

• LCD display interfaces and camera interfaces;

FET-MX9596-C SoM

NXP's Next-Generation Flagship Chip

Designed around NXP's flagship i.MX95xx series processor, it features a groundbreaking ''A55+M7+M33'' multi-core heterogeneous architecture. Through hardware-level physical isolation, it unifies high-performance computing, hard real-time control, and high-security protection.

Key Specs & Hardware Analysis:

• AI Computing Power: Integrated 2 TOPS NPU, support for overclocking to 1GHz;

• High-Performance Application Cores: 6 × ARM Cortex-A55 cores @ 1.8GHz;

• Hard Real-Time Control Core: Independent Cortex-M7 core @ 800MHz;

• Dedicated Security Core: Cortex-M33 security core @ 333MHz.

Interfaces & Expansion:

• Network Interfaces: 1 × 10GbE port, 2 × Gigabit Ethernet ports;

• Bus Interfaces: 2 × PCIe Gen3, 5 × CAN-FD;

• USB Interfaces: 1 × USB 3.0, 1 × USB 2.0.

FET3568-C SoM

The Enduring ''AIoT Blockbuster''

The FET3568-C SoM has become a recognized ''star product'' for Forlinx Embedded and the entire industry, earning the trust of a vast number of customers with its balanced performance, excellent stability, and rich ecosystem.

Key Specs & Hardware Analysis:

• AI Computing Power: Integrated 1 TOPS NPU;

• Processor Architecture: 4 × Cortex-A55 @ 2.0GHz CPU and ARM Mali-G52 GPU;

• Video Codec: H.264/H.265 1080P@60fps encode/decode.

Interfaces & Expansion:

• High Expandability: PCIe 2.1, dual Gigabit Ethernet, SATA 3.0, USB 3.0;

• Comprehensive Industrial Interfaces: Multiple UARTs, I2C, PWM, ADC, and CAN-FD.

FET3562J-C SoM

Cost-Effective Lightweight AI Pioneer

Based on the RK3562 processor, the FET3562J-C SoM is an AI product providing crucial support for projects prioritizing autonomy and controllability, ensuring high reliability and excellent performance for industrial AI applications.

Key Specs & Hardware Analysis:

• AI Computing Power: Integrated 1 TOPS NPU;

• Processor Architecture: 4 × Cortex-A53;

• High Reliability: Mature 22nm process technology, wide operating temperature range.

Interfaces & Expansion:

• Dual Gigabit Ethernet, USB 3.0/2.0, multiple UARTs, and CAN;

• MIPI DSI and MIPI CSI

FET-MX9352-C SoM

An IoT Master Control Platform Integrating Edge AI and Multi-Interface Capabilities

Based on the NXP i.MX 9352 processor, this is a highly integrated master control product developed by Forlinx Embedded for edge computing and IoT scenarios. It balances low power consumption, multiple interfaces, and basic AI capabilities, adapting to various industrial and consumer applications.

Key Specs & Hardware Analysis:

• AI Computing Power: 0.5 TOPS INT8 computing power for basic visual recognition needs;

• Processor Architecture: 2 × Cortex-A55 + Cortex-M33;

• Reliability: Operating temperature range of -40°C to +85°C, high stability.

Interfaces & Expansion:

• Networking & Communication: 2 × Gigabit Ethernet ports, 2 × CAN-FD, multiple UARTs and SPIs;

• Multimedia Interfaces: 1 × MIPI DSI, 1 × MIPI CSI, 1 × LVDS;

Summary

The Core Value of Forlinx Embedded's AI Product Portfolio

Thrugh the in-depth analysis above of Forlinx Embedded's complete AI SoM lineup, the standout advantages become evident:

1. Complete AI Portfolio: Offers a full spectrum of computing power, from the 32 TOPS FCU3501 Edge AI Box to the cost-effective 0.5 TOPS FET-MX9352-C SoM, providing flexible choices for diverse needs and budgets;

2. Industrial-Grade Reliability: Features wide-temperature design, long-term supply commitment, and rich industrial interfaces for stable operation in harsh environments;

3. Interface-Rich Design: Each SoM serves as a versatile ''interface hub,'' minimizing design constraints and speeding up time-to-market;

4. Comprehensive Support: Delivers stable system software, detailed documentation, reference designs, and expert technical support;

In the era of ''Everything Intelligent,'' Forlinx Embedded's powerful AI SoM matrix acts as a reliable ''core engine'' for industrial transformation, helping customers seize AI opportunities in 2026 and beyond.

As edge AI moves from proof of concept to full-scale deployment, striking the right balance between efficiency and computing power has become a critical challenge. In key fields such as industrial vision, intelligent security, and lightweight robotics, it's clear that simply relying on algorithmic enhancements or hardware stacking is no longer enough to win the market. What customers truly need is a solution that can steadily process 12‑megapixel video streams under strict power and cost constraints, capture useful detail in ultra‑low‑light conditions down to 0.01 Lux, and rapidly translate technical designs into real‑world products.

3 TOPS NPU: Empowering On‑Device AI Inference

The Rockchip RV1126B processor features a dedicated NPU delivering up to 3 TOPS @ INT8 AI computing power—a 50 % increase over the previous‑generation RV1126. It supports INT8/INT16 mixed‑precision operations, W4A16/W8A16 mixed‑precision quantization, and Transformer model optimization, enabling smooth execution of 2B parameter large language models and multimodal models.

This means the RV1126B can efficiently run a variety of typical edge‑AI recognition models—including face detection, hard‑hat identification, smoke‑and‑fire alerts, and intrusion detection—allowing for real‑time local decision‑making without relying on the cloud.

Multiple models were tested on the Forlinx Embedded OK1126B‑S development board. Below are the measured performance results of the RV1126B's NPU:

Large Language Models & Multimodal Models

Object Detection

Image Segmentation

Human & Facial Keypoint Recognition

The test data clearly shows that the Forlinx OK1126B‑S board equipped with the RV1126B delivers outstanding performance across various models, with particularly noticeable NPU improvements compared to its predecessor.

AI‑ISP: A More Efficient Visual Intelligence Engine

In edge AI systems, obtaining high‑quality image input is fundamental to enhancing perceptual capabilities. Traditional approaches face a bottleneck: the images output by the ISP are already compressed digital signals, making NPU‑based analysis akin to "seeing through a haze". The RV1126B's dedicated AI‑ISP integrates advanced AI algorithms directly into the ISP's raw‑data processing pipeline, achieving the dual goal of "enhancing image quality while pre‑optimizing visuals for AI understanding".

The AI model processes key stages such as 3DNR (3D Digital Noise Reduction), HDR synthesis, distortion correction, and defogging in real time. Combined with AI Remosaic technology, this enables "dual-mode day-night adaptive" imaging, producing not only visually superior images but also "AI-friendly" ones. This lays the optimal foundation for the precise and efficient inference of the backend NPU.

Notably, when running AI-ISP, the RV1126B does not occupy NPU resources, making it more bandwidth- and power-efficient compared to traditional solutions where ISP and NPU are processed together.

Versatility Across Scenarios Empowers Intelligent Upgrades

Rockchip's RV1126B, with its balanced performance, is precisely tailored for diverse edge AI scenarios:

• In smart construction sites, it enables safety monitoring features such as helmet/reflective vest detection, high-altitude object falling recognition, and unauthorized fire warnings;

• In smart warehousing, it efficiently performs tasks like barcode recognition, shelf inventory management, personnel trajectory tracking, and intrusion alerts;

• In industrial vision scenarios, it excels at identifying defects in photovoltaic panels and lithium batteries;

• In automotive applications, it supports DMS (Driver Monitoring Systems);

• For lightweight robots, it enables dynamic obstacle avoidance and path planning.

Translating chip capabilities into stable and reliable products requires a robust hardware carrier and service system. The FET1126B-S/FET1126BJ-S SoM, designed and developed by Forlinx Embedded based on the RV1126B processor series, serves this exact purpose.

The Forlinx Embedded FET1126BJ-S SoM (industrial grade) operates reliably in temperatures ranging from -40°C to 85°C, offering outstanding durability and environmental adaptability. Meanwhile, the FET1126B-S SoM (wide-temperature grade) holds a competitive edge, with commercial-grade configurations meeting operational requirements from -20°C to 85°C. Equipped with high-bandwidth LPDDR4 memory, the board achieves a balance of low cost and wide-temperature performance. Unlike DDR4, which is limited to 0°C–70°C in commercial-grade applications, LPDDR4 commercial-grade chips cover -20°C to 85°C.

Furthermore, Forlinx Embedded provides comprehensive resources—from hardware design to software deployment—along with efficient technical support services. Coupled with a stable supply chain, this significantly shortens project development cycles, reliably helping clients across industries quickly implement solutions and achieve mass production.

Conclusion: Empowering Edge AI with Rockchip's RV1126B

As edge AI transitions from concept to large-scale deployment, Rockchip's RV1126B processor delivers powerful computational support for edge intelligence, precisely addressing the core needs of various scenarios. The Forlinx Embedded FET1126B-S/FET1126BJ-S SoM series acts as a key implementation bridge. It effectively transforms the RV1126B chip capabilities into real-world product performance through robust hardware, algorithmic strengths, reliability, and technical support. Enabling rapid intelligent upgrades across industries, it is a trusted core hardware solution for scalable edge AI deployment.

Amid ongoing structural adjustments in the global memory market, LPDDR4 supply‑demand imbalance has intensified, driving up prices and creating shortages that strain the entire supply chain. This makes stable access to core components such as memory a critical competitive advantage. For Forlinx Embedded, ensuring supply‑chain resilience and supporting customers' mass‑production plans are therefore top strategic priorities.

Recognizing these industry-wide challenges, Forlinx Embedded has proactively implemented forward-looking strategies. We have fully adapted and validated the upgrade of our RK3588 and RK3576 SoM series to LPDDR5 memory, with plans to gradually extend this upgrade to additional platforms in the future. This initiative underscores Forlinx Embedded's core capability to empower customers through its supply chain strengths.

I. Proactive Response to Mitigate Supply Risks

Passive adaptation cannot fundamentally ensure the long-term security of customer projects amid the structural imbalance in LPDDR4 supply and demand. Therefore, Forlinx Embedded has chosen proactive upgrading as a strategic pivot—advancing the transition of its product platforms to LPDDR5, a technology that is both more advanced and supported by more forward-looking capacity planning. This decision is rooted in our in-depth analysis of industry trends and aims to help customers overcome current supply chain limitations, thereby securing more sustainable and reliable support for core components.

II. Dual Value: Technological Advancement + Supply Assurance

This upgrade delivers dual benefits in performance and supply chain security:

1. Technological Leap Forward:

LPDDR5 memory delivers higher bandwidth and superior energy efficiency, unlocking the full potential of high‑end platforms such as the RK3588 and RK3576. This enables our solutions to better meet the demanding memory requirements of cutting‑edge applications—including AI, high‑performance computing, and complex multimedia processing—giving end products a stronger competitive edge;

2. Systematic Supply Assurance:

The supply stability advocated by Forlinx Embedded is rooted in systematic safeguarding capabilities:

① Forward-Looking Planning:

Proactively upgrading existing products to LPDDR5 effectively mitigates the long-term capacity constraints and price volatility associated with LPDDR4 memory.

② Strategic Collaboration:

Through deep partnerships with multiple memory manufacturers and suppliers, including early engagement and joint capacity planning, Forlinx Embedded secures prioritized access to core resources;

③ Systematic Management:

With a mature supply chain management system encompassing accurate forecasting, inventory optimization, and multi-source preparedness, Forlinx Embedded ensures predictable and plannable delivery, providing a solid foundation for the smooth progress of customer projects.

III. Becoming a More Trustworthy Partner

In an uncertain market environment, Forlinx Embedded proactively meets customer needs through decisive technological upgrades and agile supply chain strategies. We believe a true partnership is built on steadfast support during challenges and a shared vision for the future.

Choosing Forlinx Embedded means choosing a partner who places "stable supply" at the heart of their strategy. Moving forward, we will continue to strengthen our supply assurance system, delivering more innovative products, more reliable delivery, and closer collaboration to help every customer seize market opportunities with confidence—steadily advancing toward shared success.

In embedded system debugging, device interconnection, and system integration, a stable, low-cost, and easily deployable communication method is crucial. On the Rockchip OK3588 platform (Linux 5.10.66 + Buildroot), a solution has been implemented that enables device-to-device communication through a USB NIC, allowing fast point-to-point network connections without requiring additional Ethernet ports or switching equipment.

Solution Overview

This solution leverages the Linux USB Gadget mechanism, allowing the board to automatically create a virtual NIC (usb0) in either USB Host or Device mode. By combining USB physical connectivity with network-protocol communication, it supports:

• TCP/IP communication between devices
• Rapid debugging / remote maintenance
• System integration / functional validation
• Cross-platform collaboration (OK3588 + RK3562)

1. Source Code Modification

RK3562: In addition to the article's configurations, the following should be added:

OK3588: No device-tree changes are needed. Simply enable the same options in menuconfig.

2. Commands

Master-slave mode switching command of #3562usb interface
cat /sys/kernel/debug/usb/fe500000.usb/mode
echo host > /sys/kernel/debug/usb/fe500000.usb/mode
echo device > /sys/kernel/debug/usb/fe500000.usb/mode
Master-slave mode switching command of #3588typec0 interface
cat /sys/kernel/debug/usb/fc000000.usb/mode
Master-slave mode switching command of #3588typec1 interface
cat /sys/kernel/debug/usb/fc400000.usb/mode

Use the above commands to view the current USB mode (host/device).

In device mode, a virtual NIC usb0 is generated for recognition by host devices.

In host mode, the USB interface detects the virtual NIC of another board and creates a usb0 node for communication.

Note: Communication requires one device in host mode and the other in device mode.

Switch with the above two commands

OK3588 has two Type-C ports: typec0 and typec1. typec0 operates in Device mode only, while typec1 operates in Host mode only. When switching modes, be mindful of hardware connections.

typec0 address: sys/kernel/debug/usb/fc000000.usb/mode

typec1 address: sys/kernel/debug/usb/fc400000.usb/mode

3. Testing Steps

3.1 OK3588 as Host, RK3562 as Device:

Usb0 is the node generated by typec0 as the device, and usb1 is the node detected by typec1 connected to 3562. Therefore, in this test, usb1 is selected for the ping connectivity test.

On 3588:

On 3562:

3.2 OK3588 as Device, RK3562 as Host

On 3588:

On 3562:

The USB virtual network card communication product solution is designed with a focus on simplicity, stability, and low cost. It provides an efficient method for device interconnection on the OK3588 platform. It serves not only as a debugging tool but also as a standardized communication capability ready for product integration, helping customers quickly build reliable embedded network systems.

On the i.MX 8MP platform, when the M-Core (Cortex-M7) requires access to GPIO pins, resource conflicts often arise with the Linux-based A-Core (Cortex-A53).

Why Release Pins?

In a dual-core system (A-Core + M-Core), GPIO pins are typically managed by the A-Core (Linux drivers) by default. When the M-Core needs to access a specific GPIO (e.g., for interrupt input, control signals, etc.), and the A-Core still holds that pin, the following issues may occur:

GPIO cannot respond to interrupts

• M-Core access failures

• GPIO cannot respond to interrupts

• System resource conflicts or abnormal output

Therefore, it is essential to release the pin multiplexing and any associated device node references on the A-Core side.

Release Method

The process primarily involves two steps:

1. 1. Comment out the pinmux (pin multiplexing) configuration;
2. 2. Comment out all device nodes that reference the GPIO.

Detailed Steps

Comment Out Pinmux Configuration

Taking a button GPIO as an example, locate the following in the device tree file:

OK8MP-linux-kernel/arch/arm64/boot/dts/freescale/OK8MP-C.dts

Find the pinctrl_gpio_key node and comment out the multiplexing configuration for the target GPIO.

pinctrl_gpio_key: gpiokeygrp {
    fsl,pins = <
        /*MX8MP_IOMUXC_SAI2_TXFS__GPIO4_IO24    0x159
        MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18  0x159*/
    >;
};

For other GPIOs, you can refer to the official Pin Multiplexing Table (Pinmux Table) to identify and modify the corresponding configurations.

Annotate the calls to GPIO in the device tree

Simply commenting out the pin multiplexing is not enough. If there are still nodes in the device tree that reference these GPIOs (for example, in gpio-keys), the Linux kernel will still attempt to claim these pins during boot.

Continue to search in OK8MP-C.dts for the keys node and comment out its GPIO pin references.

keys {
    compatible = "gpio-keys";
    pinctrl-names = "default";
    pinctrl-0 = <&pinctrl_gpio_key>;
    
    up {
        label = "GPIO Key UP";
        linux,code = <103>;
        debounce-interval = <20>;
        /*gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;*/
    };
    down {
        label = "GPIO Key DOWN";
        linux,code = <108>;
        debounce-interval = <20>;
        /*gpios = <&gpio4 18 GPIO_ACTIVE_LOW>;*/
    };
};

Additional Steps for M-Core GPIO Interrupt Usage

When the M-Core needs to use a GPIO for interrupts (and the pin does not belong to the GPIO1 group), the A-Core must not only release that specific GPIO but also comment out the entire GPIO controller node for that group in the device tree.

Taking gpio2 as an example, edit the file:

OK8MP-linux-kernel/arch/arm64/boot/dts/freescale/imx8mp.dtsi

Comment out the relevant section as shown below:

/*gpio2: gpio@30210000 {
    compatible = "fsl,imx8mp-gpio", "fsl,imx35-gpio";
    reg = <0x30210000 0x10000>;
    interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
                 <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
    clocks = <&clk IMX8MP_CLK_GPIO2_ROOT>;
    gpio-controller;
    #gpio-cells = <2>;
    interrupt-controller;
    #interrupt-cells = <2>;
};*/

Note: After commenting out this node, Linux will no longer register this GPIO controller, completely releasing it for M-Core use.

Verification

After applying the above modifications, recompile and flash the kernel. At this point:

The A-Core will no longer occupy the relevant GPIOs;

The M-Core can access and configure them normally, for example as interrupt inputs;

There will be no resource conflicts or device tree loading warnings.

By following the methods outlined in this document, you can safely release GPIOs from the OK8MP A-Core, providing the M-Core with an independent and controlled resource access channel.

Nginx (engine x) is an open-source, high-performance Web server, reverse proxy server, load balancer, and HTTP cache server. It is characterized by low memory usage and strong concurrency ability. In fact, Nginx performs well in terms of concurrency among web servers of the same type. It is developed using the C programming language.

Nginx is specifically developed for performance optimization. Performance is an important consideration in its design. It focuses highly on efficiency in implementation and can withstand high-load tests, supporting up to 50,000 concurrent connections.

1. Compilation and Porting

1.1 Compile nginx-1.8 in Yocto

Execute the following commands for compilation:

$ DISTRO=fsl-imx-x11 MACHINE=imx6ull14x14evk source fsl-setup-release.sh -b build_x11
$ bitbake nginx

During the compilation process, the following errors appeared:

Solution:

Modify the build_x11/conf/bblayers.conf file and add the source code path of Nginx to the file. build_x11 is the installation and compilation path defined by yourself.

Modify the content as follows:

After adding, execute bitbake nginx again for compilation.

1.2 Package the Image

After compilation, go to the

build_x11/tmp/work/cortexa7hf-neon-poky-linux-gnueabi/nginx/1.8.1-r0/image

$ cd tmp/work/cortexa7hf-neon-poky-linux-gnueabi/nginx/1.8.1-r0/image
$ tar -cjvf nginx-1.8.1.tar.bz2 *

1.3 Transplant

Extract the image packaged in the previous step to the root path of the system.

tar -xvf nginx-1.8.1.tar.bz2 -C /

2. Test

2.1 Reverse Proxy

2.1.1 Tomcat Installation

① Install the JDK environment

Download address: Oracle JDK 8 Downloads

Download the following two files:

jdk-8u151-linux-arm32-vfp-hflt.tar.gz

jdk-8u151-linux-arm32-vfp-hflt-demos.tar.gz

Extract them to the development board:

Extract the above two compressed packages to /home/root/jdk1.8.0_151.

Modify the environment variables:

Add the following content at the end of the /etc/profile file:

JAVA_HOME=/home/root/jdk1.8.0_151
CLASSPATH=.:$JAVA_HOME/jre/lib/rt.jar:$JAVA_HOME/lib/dt.jar:$JAVA_HOME/lib/tools.jar
PATH=$JAVA_HOME/bin:$PATH
export JAVA_HOME CLASSPATH PATH

Execute the following command to make the environment variables take effect immediately:

$ source /etc/profile

Verify whether the installation is successful:

Enter the following command to check the Java version:

$ java -version

② Install Tomcat

Download the source code: Tomcat 9.0 Downloads. Here, download version 9.0.108.

Extract the downloaded

apache-tomcat-9.0.108.tar.gz

/home/root

tar -xvf apache-tomcat-9.0.108.tar.gz -C /home/root

Start the Tomcat service:

cd /home/root/apache-tomcat-9.0.108/bin
./startup.sh

After starting, enter 192.168.1.13:8080 in the browser, and the Tomcat interface will be displayed.

2.1.2 Modify Nginx Configuration

Modify the /etc/nginx/nginx.conf file:

server {
    listen 80;
    server_name www.123.com;
    
    location / {
        proxy_pass http://192.168.1.13:8080/;
        index index.html index.htm;
    }
}

• listen: It indicates that the port 80 is monitored.

• server_name: The access domain name is defined here.

• proxy_pass: It is a proxy forwarding module. Its main function is to forward www.123.com requests to http://192.168.1.13:8080/.

Start the Nginx service:

mkdir /run/nginx
nginx -c /etc/nginx/nginx.conf

Modify the hosts file in Windows:

Press Win + S, run Notepad as an administrator, open the hosts file under C:\Windows\System32\drivers\etc, and add the mapping.

Test:

Enter www.123.com in the browser, and you can access the Tomcat interface via Nginx.

2.2 Load Balancing

1. Setup Service 8080:

Rename the above-mentioned apache-tomcat to apache-tomcat8080, and create a test file:

mv apache-tomcat-9.0.108/ apache-tomcat8080/
cd apache-tomcat8080/webapps
mkdir test
vi test.html

<!--apache8080-->
<html>
<body>welcome to service 8080</body>
</html>

2. Setup Service 8081:

Extract another Tomcat package and rename it as apache-tomcat8081. Modify its server.xml port settings:

mv apache-tomcat-9.0.108/ apache-tomcat8081/
cd apache-tomcat8081/conf
vi server.xml

Create the test page for 8081:

<!--apache8081-->
<html>
<body>welcome to service 8081</body>
</html>

3. Modify Nginx for Load Balancing:

Add the upstream block to nginx.conf:

upstream myserver {
    server 192.168.1.13:8080;
    server 192.168.1.13:8081;
}
server {
    listen 80;
    server_name www.123.com;
    location / {
        proxy_pass http://myserver;
        index index.html index.htm;
    }
}

Result:

Restart the nginx service. When accessing www.123.com/test/test.html and opening multiple web pages, you will find that the page content alternates between the services on ports 8080 and 8081. This realizes load balancing.

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The test is conducted using the standard development environment of Linux 4.19.206 on the OK3568-C development board, which is equipped with the Rockchip RK3568 processor. It has a stable network foundation and can meet the transmission requirements of the TFTP protocol. During the testing, the TFTP server was deployed on the Ubuntu system. Ubuntu and the RK3568 development board were configured in the bridge mode (by leveraging the hardware advantage of the dual network interfaces on the development board, the network transmission latency can be reduced). The server address was set to 172.16.0.177.

Make sure to place the system images (boot.img and rootfs.img) in the TFTP server directory beforehand. Additionally, verify that there is a proper network connection between the development board and the server, as this is essential for the process to run smoothly.

Forlinx RK3568 SoM

1. Configuring U-Boot Environment Variables for Network Access

The Uboot environment configuration of the RK3568 development board is simple and intuitive. Coupled with the on-board Type - C Debug interface (which integrates a USB - to - serial chip, eliminating the need for an additional adapter), developers can quickly enter the Uboot command line through terminal tools (such as SecureCRT and Xshell) to complete the network parameter configuration.

Operation tips: The default baud rate of the Type - C Debug interface is 115200bps, with 8 data bits, 1 stop bit, and no parity check. After connecting, restart the development board to enter the Uboot command line.

=> setenv ethaddr 22:51:a2:cc:47:2d # Set the Ethernet MAC address of the development board to ensure a unique network identity
=> setenv ipaddr 172.16.0.176 # Configure the static IP of the development board, which should be in the same network segment as the server
=> setenv gatewayip 172.16.0.218 # Set the gateway address to ensure cross - network segment communication (if needed)
=> setenv netmask 255.255.0.0 # Configure the subnet mask to match the LAN network segment planning
=> saveenv # Save the environment variables to the eMMC to prevent data loss after restart
Saving Environment to ENV_BLK… 	
Saving Environment to ENV_BLK...
Writing to mmc(0)... done
# Verify network connectivity: first ping the real machine, then ping the Ubuntu server
=> ping 172.16.0.77 # Test the network connectivity between the development board and the real machine
ethernet@fe2a0000 Waiting for PHY auto negotiation to complete. done
Using ethernet@fe2a0000 device
host 172.16.0.77 is alive
=> ping 172.16.0.177 # Crucial step: verify the connectivity with the TFTP server (if it fails, check the VMware bridge mode or the network cable connection of the development board)
Using ethernet@fe2a0000 device
host 172.16.0.177 is alive
=> setenv serverip 172.16.0.177 # Specify the IP of the TFTP server, and subsequent transmissions will default to this address
=> saveenv
Saving Environment to ENV_BLK...
Writing to mmc(0)... done

Note: If pinging the server fails, you need to prioritize the following checks:

1. Whether the VMware network is set to ''Bridge mode'';
2. Whether the network cable connection of the development board is normal (it is recommended to use Category 5e or better network cables);
3. Whether the TFTP port (default port 69) is blocked by the server firewall.

2. Querying the eMMC Partition Table

The Forlinx Embedded RK3568 development board offers multiple eMMC storage options of 8/16/32/64GB. In this test, the standard Linux partition plan is adopted. The complete partition structure can be viewed through the mmc part command to clarify the target partitions for the boot.img (boot image) and rootfs.img (file system image).

= > MMC part # List the partition table for eMMC device 0 (Partition Type: EFI）
Partition Map for MMC device 0  --   Partition Type: EFI
Part    Start LBA       End LBA         Name        Attributes    Type GUID    Partition GUID
  1     0x00004000      0x00005fff      "uboot"     0x00000000    0a100000-...  b7030000-...
  2     0x00006000      0x00007fff      "misc"      0x00000000    420c0000-...  ca5e0000-...
  3     0x00008000      0x00017fff      "boot"      0x00000000    aa0c0000-...  81190000-...  # boot.img target partition
  4     0x00018000      0x00027fff      "recovery"  0x00000000    2a050000-...  c4620000-...
  5     0x00028000      0x00037fff      "backup"    0x00000000    aa600000-...  7b5d0000-...
  6     0x00038000      0x00c37fff      "rootfs"    0x00000000    12770000-...  614e0000-...  # rootfs.img target partition
  7     0x00c38000      0x00c77fff      "oem"       0x00000000    4a1c0000-...  e52f0000-...
  8     0x00c78000      0x01d59fbf      "userdata"  0x00000000    3b120000-...  680f0000-...

This partition plan is fully adapted to the multi - system characteristics of the RK3568 development board. If it is necessary to switch to the Android or OpenHarmony system, only the partition table needs to be adjusted through the partition_tool.sh script provided by Forlinx Embedded, without replacing the hardware.

3. Flashing boot.img to the Boot Partition via TFTP

Use the tftpflash command to directly load the boot.img from the TFTP server to the ''boot'' partition (partition 3) of the eMMC. The high - speed data processing capability of the RK3568 processor can ensure a stable TFTP transmission rate, ensuring the rapid completion of the boot image flashing.

Explanation of the tftpflash command: tftpflash [loading address] [file name] [target partition name]

=> tftpflash 0x09400000 boot.img "boot"
Using ethernet@fe2a0000 device
TFTP from server 172.16.0.177; our IP address is 172.16.0.176
Filename 'boot.img'.
Load address: 0x9400000
Loading: #################################################################
         #################################################################
         ......（Omit the intermediate loading process）
         ###############################################
         3.1 MiB/s
done
Bytes transferred = 23584256 (167de00 hex)
## TFTP flash boot.img to partititon 'boot' size 0x167de00 ... OK
reboot # Restart after burning is completed to verify whether the boot partition is normal (optional step. You can also restart the system after flashing the rootfs).

Technical highlights:

The boot.img contains the kernel and device tree, and the stability of its flashing directly affects the system startup. The eMMC of the RK3568 supports the ''bad block management'' function. Coupled with the 5V/12V power protection design of the carrier board, it can avoid image damage caused by voltage fluctuations during the flashing process, meeting the long - term operation requirements of industrial scenarios.

4. Flashing rootfs.img to the Rootfs Partition via TFTP

The rootfs.img contains a complete file system (such as directories like /bin, /etc, /lib). It needs to be flashed to the ''rootfs'' partition (partition 6). The rootfs partition of the RK3568 development board has sufficient reserved space (the partition size in this test is about 1.9GB). It can not only accommodate the basic file system but also meet the needs of subsequent function expansion. For example, the development board has an NPU with a computing power of 1 TOPS. If you need to deploy a lightweight AI application, you can directly integrate the RKNN - Toolkit tool (supporting one - click conversion of mainstream models such as Caffe, TensorFlow, and PyTorch) into this file system without additional adjustment of the storage architecture.

=> tftpflash 0x09400000 rootfs.img "rootfs"
Using ethernet@fe2a0000 device
TFTP from server 172.16.0.177; our IP address is 172.16.0.176
Filename 'rootfs.img'.
Load address: 0x9400000
Loading: #################################################################
         #################################################################
         ......（Omit the intermediate loading process, as the file is large and the loading time is slightly longer）
         #################################################################
done
Bytes transferred = 1404391424 (53b55000 hex)
## TFTP flash rootfs.img to partititon 'rootfs' size 0x53b55000 ... OK
=> reboot # After flashing is completed, restart the development board to enter the target system

Note:

The RK3568 development board features a split design consisting of a "SoM" and a "carrier board." If it is necessary to expand storage—such as adding a hard disk via the SATA 3.0 interface—or modify networking options by adding a 4G/5G module through the M.2 Key - B interface, there is no need to re - flash the file system. Instead, the necessary drivers can simply be installed within the existing system. Pre - compiled drivers are available in the Forlinx Embedded data package, which greatly simplifies the process of function iteration.

5. Summary

The operation of flashing the file system via TFTP on the Forlinx Embedded RK3568 development board not only demonstrates the convenience of its basic functions (such as simple Uboot commands and stable network transmission) but also shows the core advantages of the product:

• Industrial - grade reliability: EMC protection, industrial - grade eMMC, and power protection, suitable for complex on - site environments;
• High scalability: Dual Gigabit Ethernet, SATA3.0, and M.2 interfaces support flexible expansion of storage and networking functions;
• AI computing power integration: The 1 TOPS NPU supports lightweight AI applications, and development tools can be directly integrated into the file system;

With the complete technical data and technical support from Forlinx Embedded, developers can easily complete the entire process from image flashing to function expansion, accelerating the product implementation in fields such as industrial control, smart devices, and edge computing.

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Forlinx Embedded, a leading provider of embedded computing solutions, is pleased to announce the appointment of AITECH INC. as its official authorized distributor in Korea. This strategic partnership further strengthens Forlinx Embedded’s local sales, technical support, and customer service capabilities in the Korean market.

Seamless Local Support

Expanding Market Reach

By leveraging integrated online and offline channels, Forlinx Embedded and AITECH INC. aim to enhance product availability and solution support for developers, OEMs, and industrial customers across Korea.

Strategic Partnership

• Establishing a long-term strategic partnership focused on sustainable business growth
• Combining Forlinx Embedded’s technology innovation with AITECH INC.’s strong local expertise and network

About AITECH INC.

AITECH INC. is a leading and respected distributor in Korea, specializing in embedded technologies. With a proven track record of delivering high-quality solutions and support, they are a trusted partner for developers, OEMs, and industrial clients.

The company is ISO14001, ISO9001, AS9120, and Kiwa certified, demonstrating their commitment to the highest standards in aerospace, defense, and related industries.

According to a report by the internationally renowned market research firm Research Nester, the global AIoT market reached a scale of $78.7 billion in 2024, and it is estimated that this figure will reach $83.6 billion in 2025. Against the backdrop of the expansion of the global AIoT market, the core competitiveness of Chinese enterprises in overseas markets is shifting from the early stage of ''getting certifications just for the sake of it'' to ''paying more attention to product strength by aligning with international top - level standards from the very beginning of design''.

The FCU3501 AI edge computing box developed by Forlinx Embedded, based on the industrial-grade Rockchip RK3588J processor, is a practical result of this concept. Behind obtaining the three authoritative certifications of CE, FCC, and RoHS is an R&D logic that starts with an ''international high-standard'' foundation from the initial design.

1. What Does It Mean to Have the Three Authoritative Certifications?

For embedded products, international authoritative certifications are not just ''the key to enter the market'', but also ''a touchstone to test whether the product design meets global top - level standards''. In Forlinx Embedded's R&D logic, certification requirements are never the ''end-goal'', but the ''starting point of design''. From circuit architecture to material selection, from heat dissipation solutions to firmware adaptation, every aspect is based on international certification standards, making ''compliance'' a natural outcome of the design process.

CE Certification - The ''Access Key'' to the EU Market

CE certification is a mandatory safety certification established by the EU for products entering its market, covering multiple fields such as electronics and machinery. The AI edge - computing box featuring RK3588J has secured the certification, indicating it meets the EU's "New Approach to Technical Harmonization and Standardization" directive. With international - standard electromagnetic compatibility and safety performance, it can access the markets of 27 EU member states and numerous other CE - recognized countries and regions, eliminating the need for retesting and re-certification.

FCC Certification - The ''Safety Endorsement'' for the North American Market

FCC certification is a mandatory certification established by the US Federal Communications Commission for electronic electromagnetic compatibility, and its standards are known for being strict and rigorous. Obtaining this certification indicates that the FCU3501 AI edge computing box has undergone strict electromagnetic compatibility tests in the laboratory. It performs excellently in electromagnetic radiation control, will not interfere with surrounding electronic devices, and can also resist the influence of external electromagnetic signals. Such high - standard quality ensures its stability and safety when used in the North American market, providing core qualification guarantees for the product to enter the mainstream North American market.

RoHS Certification - The ''Quality Promise'' of Green Environmental Protection

RoHS certification is an environmental protection certification regarding the restriction of the use of hazardous substances in electrical and electronic equipment. The core is to limit the content of six hazardous substances such as lead, mercury, and cadmium. The FCU3501 AI edge computing box's RoHS certification compliance showcases Forlinx Embedded's dedication to environmental protection. This product adheres to green requirements across its lifecycle, from production to disposal. It meets the selection criteria of industries with strict eco - standards like medical, food, and high - end manufacturing, aligning with the global green and low - carbon trend.

2. What Value Does It Bring to Customers?

Securing the three authoritative certifications brings tangible value customers can feel, offering comprehensive empowerment from project compliance and cost control to quality assurance and market expansion.

Remove Compliance Obstacles and Accelerate Global Implementation

For customers who need to expand into overseas markets, product certification is often a key bottleneck in project implementation. The FCU3501 AI edge computing box has already completed the core market certifications such as CE and FCC in advance. Customers do not need to invest additional time, manpower, and funds in obtaining certifications. They can directly integrate the product into the terminal solutions and launch them into the global market, significantly shortening the project cycle and seizing market opportunities.

Reduce Selection Risks and Ensure Project Stability

Behind the authoritative certifications is Forlinx Embedded's strict control over the entire product R & D and production process. From the selection of the industrial - grade RK3588J processor to circuit design, heat dissipation optimization, and firmware adaptation, every aspect has been thoroughly verified. The certified FCU3501 AI edge - computing box ensures reliable electromagnetic compatibility, stability, and safety. It reduces customer product - selection risks, avoids losses like project delays and rework due to product issues, and guarantees long - term stable operation of terminal solutions.

Adapt to Diverse Scenarios and Expand Application Boundaries

With the support of CE, FCC, and RoHS certifications, the application scenarios of the FCU3501 AI edge computing box have been further expanded. Whether it is an industrial automation production line in the EU region, an intelligent security project in North America, or scenarios with extremely high environmental protection and safety requirements such as medical equipment, rail transit, and smart energy, the FCU3501 AI edge computing box can be compliant and adaptable. Combined with its powerful AI computing capabilities based on the RK3588J processor's 6TOPS NPU and an extended computing power card (supporting multi-channel video decoding and AI inference acceleration), it can easily meet the core requirements of edge-end data processing and intelligent analysis.

3. Conclusion

Certification is not the ''goal'', but a natural result of ''high - standard design''. Forlinx Embedded firmly believes that guiding product design by global customer scenario requirements and aligning with international top - notch standards from the very beginning, so that products ''naturally meet'' high - end safety, electromagnetic compatibility, and environmental - protection demands, far outweighs the practice of ''getting certifications for the sake of it''.

In the future, Forlinx Embedded will further strengthen its position in the embedded field. It will refine products to even stricter standards and obtain more comprehensive certifications to penetrate the global market, thereby supporting the digital transformation and intelligent upgrading of customers across diverse industries.

Ready to take your project further? Talk to our engineers for technical insights and tailored support.

Contact our engineers now

As AI deployment continues shifting from centralized cloud processing to distributed edge-side intelligence, demand for compact and cost-efficient AI computing modules is growing across smart manufacturing, public safety, logistics, and infrastructure. Many organizations now seek local AI inference to reduce bandwidth dependence and improve real-time responsiveness. In this landscape, low-power and scalable edge modules are becoming essential building blocks for AI-driven devices and industrial automation.

In response to these evolving market needs, Forlinx Embedded Technology is proud to announce the official release of the FET1126Bx-S (Rockchip RV1126B/RV1126BJ) Industrial System on Module (SoM). Specifically engineered for edge-side AI computing, this compact module offers a high-performance, cost-effective solution for real-time video analysis and intelligent recognition in demanding industrial environments.

Edge-Optimized Architecture for Real-Time AI

The FET1126Bx-S integrates a quad-core Arm Cortex-A53 CPU (up to 1.6 GHz commercial / 1.3 GHz industrial) paired with a 3 TOPS NPU supporting INT8/INT16 mixed-precision operations, enabling efficient execution of complex AI models such as personnel recognition, object detection, behavior monitoring, and fire or smoke alarms—directly at the edge without cloud dependency.

For rapid deployment, the RKNN toolchain ensures compatibility with major frameworks such as TensorFlow, PyTorch, Caffe, and MXNet.

Compared to the previous generation, the new FET1126Bx-S delivers significant upgrades in CPU/NPU processing power and transitions to Linux 6.1, ensuring a more powerful and seamless AI development journey.

High-Performance Multimedia Pipeline

• Video & ISP

  H.265/H.264 4K hardware decoding; parallel encoding up to 12 M @ 30 fps

  12 Mbps ISP and 8 Mbps AI-ISP supporting HDR, 3DNR, fisheye correction, and dehazing

• Display Interfaces (single display output, up to 1920×1080 @ 60 fps)

  4-lane MIPI-DSI, 1.5 Gbps per lane for FHD panels

  BT.656 / BT.1120 digital output for SD/HD/FHD displays with embedded sync

  24-bit parallel RGB, up to 1920×1080 @ 60 fps

• Camera Interfaces

  Up to 2 × MIPI-CSI, 4-lane MIPI D-PHY v1.2 up to 2.5 Gbps/lane (MIPI-CSI/LVDS/Sub-LVDS)

  DVP parallel camera input up to 150 MHz, compatible with BT.601 / BT.656 / BT.1120

Rich Connectivity in an Ultra-Compact Form Factor

Only 40mm×40mm with 237 pins led out via stamp hole and LGA connection. (140 stamp-hole pins at 1.0 mm pitch + 97 LGA pins at 1.27 mm pitch)

All functional pins of the RV1126B/RV1126BJ are fully led out, including display interfaces (MIPI-DSI, RGB LCD), network interfaces (Gigabit RGMII, 100Mbps Ethernet), and various peripherals (CAN FD, UART, SPI, I2C, PWM, ADC, etc.). The GPIO layout is fully compatible with the Raspberry Pi 40-pin standard.

Industrial-Grade Design and Reliability

Designed for long-term deployment, the FET1126Bx-S supports continuous 24/7 operation across −40°C to +85°C, with LPDDR4 memory providing lower power consumption and improved resilience for different industrial environments.

Configurable LPDDR4 memory(1GB, 2GB, or 4GB) and eMMC storage options tailored to application needs: Fixed 64GB eMMC on the commercial variant and 8GB/16GB/32GB eMMC options on the industrial variant.

Each module undergoes rigorous stability and reliability testing in the Forlinx Embedded Laboratory, supporting 10–15 years of product longevity to ensure consistent long-term supply for industrial applications.

Target Applications

Designed for the next generation of smart infrastructure, the FET1126Bx-S is the ideal choice for:

• Smart Industries: Real-time production monitoring and equipment inspection.

• Smart Parks & Construction: Personnel safety (helmet detection), area intrusion, and smoke/fire alarms.

• Edge Computing & AIoT: Embedded vision and local AI inference for diverse IoT sensors.

Accelerate Your Time-to-Market

To help developers jumpstart their projects, Forlinx offers the OK1126Bx-S Evaluation Board. This production-ready platform features dual network ports, 2x MIPI-CSI, and a Raspberry Pi compatible 40-pin GPIO header, allowing you to bypass complex hardware design and focus entirely on your software application.

Availability

To support early-stage evaluation and design verification, Forlinx Embedded is currently offering a limited allocation of free engineering samples to qualified industrial customers and solution partners.

Requests may be submitted through the official website or by contacting sales@forlinx.com. Sample approval is subject to project scope and availability.

Ready to take your project further? Talk to our engineers for technical insights and tailored support.

Contact our engineers now

I'm sure you've experienced such a scenario:

At 8 a.m., on the city's east - west arterial road, there was a queue over 500 meters long in the left - turn lane. In contrast, the straight lane was almost empty with sparse traffic. At this moment, the prominent flexible lane sign still stubbornly showed a straight arrow because, according to the preset schedule, it wouldn't switch to a left - turn arrow until 9 a.m. Such scenarios occur in countless cities every day.

Traditional flexible lane control relies on timed strategies or centralized cloud scheduling. The former executes rigid commands, while the latter is restricted by network latency and the bottleneck of central computing power. The process from perception to decision - making is too long. The traffic lights can ''see'' the situation but can't ''come up with a better solution''.

So, can we give intersections a local ''brain'' that can autonomously make optimal lane control decisions within seconds or even milliseconds based on real - time holographic perception?

Deploy AI at the Data Source

The answer lies in edge intelligence. This doesn't mean replacing the cloud. Instead, it involves moving some core perception, analysis, and decision-making capabilities down to the device end at intersections, forming an efficient collaborative model of ''edge perception and decision-making + cloud overall planning and optimization''. The key to realizing this model lies in a hardware carrier that is powerful, reliable, and open enough. It must be able to run continuously in harsh outdoor environments, process multiple channels of high-definition video streams, run complex AI algorithms, and directly communicate with the traffic control system.

The FCU3501 AI edge computing box, developed by Forlinx Embedded based on the RK3588J industrial-grade processor, is a dedicated hardware designed for such high - demand scenarios.

1. Deterministic Computing Power: From ''Seeing'' to ''Understanding and Judging Accurately''

The core of intersection intelligence is visual perception. The NPU with a computing power of 6 TOPS built into the FCU3501 AI edge computing box provides a solid foundation for the local operation of algorithms. This means that AI models such as traffic flow detection, queue length analysis, and accident recognition deployed on it can complete real - time analysis locally without transmitting video streams back to the cloud. The integrated 4×Cortex - A76 + 4×Cortex - A55 octa - core CPU enables it to execute more complex tasks more efficiently.

For example, it can simultaneously process up to 16 channels of 1080P high - definition video, accurately identify the traffic volume, vehicle types, and abnormal events in each direction within 100 milliseconds, providing immediate and accurate data for lane - switching decisions.

2. Deterministic Connectivity: Closing the ''Perception - Decision - Control'' Loop

If intelligence can't be implemented, it's just a castle in the air. It ensures that decisions can be promptly translated into actions through its rich industrial - grade interfaces:

Dual Gigabit Ethernet Ports： Easily connect to front - end cameras and back - end networks, and support network redundancy.

Support for Connecting Computing Power Cards： In the future, if more complex AI models (such as holographic perception) need to be run, it can be seamlessly upgraded through computing power cards to protect the investment.

Support for Connecting Hard Drives： It can store event videos and traffic data locally for post - event tracing and analysis.

Deterministic Reliability, Fearless of Harsh Environments

Intelligent transportation equipment needs to run continuously 24/7, 365 days a year. With its industrial - grade design featuring a wide operating temperature range from - 40°C to + 85°C and a fanless, fully sealed metal casing, it can work stably in outdoor cabinets, withstanding cold, heat, dust, and moisture. This reliability is the fundamental guarantee for the ''edge brain'' at intersections to perform its duties faithfully for years.

Upgrade from ''Automatic Execution'' to ''Autonomous Intelligence''

Through the deployment of the edge intelligence core like the FCU3501 AI edge computing box, the control logic of intelligent flexible lanes has undergone a fundamental transformation:

From ''Timed'' to ''Real - time'': The response time has been shortened from hours/minutes to seconds.

From ''Centralized'' to ''Distributed'': It reduces network dependence and cloud pressure, limits the impact of single - point failures, and enhances the system's resilience.

From ''Preset'' to ''Autonomous'': It makes autonomous decisions based on real - time holographic perception data, maximizing resource utilization.

Ultimately, this not only improves the efficiency of individual intersections but also lays the most crucial underlying capabilities for building a future regional - collaborative intelligent transportation network. When each intersection has a stable and intelligent ''edge brain'', the traffic pulse of the entire city can beat more smoothly and vigorously.

The above is the core value of Forlinx Embedded's FCU3501 AI edge computing box in intelligent intersections.

Ready to take your project further? Talk to our engineers for technical insights and tailored support.

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From December 18 to 19, 2025, the highly anticipated ''CIAA25 - Summit Forum on the Development of Motion Control and Direct-Drive Technology Industry and Award Ceremony'' was held in Shenzhen. As an important ecological partner of the MECHATROLINK Association, Forlinx Embedded was deeply involved in this event, jointly showcasing the innovative achievements and ecological strategies of ''software - hardware integration'' in the fields of industrial communication and motion control.

1. Deepening Ecological Cooperation to Empower Industry Implementation

At this summit forum, the MECHATROLINK Association announced a deep - seated cooperation with Forlinx Embedded. This strategic alliance aims to deeply integrate the new-generation MECHATROLINK-4 protocol into Forlinx Embedded's high-performance SoM platform, jointly create standardized and open development solutions, and promote the rapid popularization and application of motion control technology in multiple industrial scenarios.

Forlinx Embedded's development board products such as OK3588-C and OK-MX9596-C will be the first batch of key hardware platforms to carry the MECHATROLINK - 4 protocol. With their robust computing capabilities, diverse interfaces, and exceptional reliability, these platforms can fully harness the potential of the full-duplex, high-speed, and low-latency communication offered by the MECHATROLINK-4 protocol.

OK3588-C Development Board

OK-MX9596-C Development Board

Software - Hardware Integration'' Solution to Accelerate Product Launch for Customers

The core value of this cooperation lies in the rapid deployment of ''software-hardware integration''. For equipment manufacturers in fields such as industrial robots, CNC machine tools, and semiconductor equipment, traditional solutions have long development cycles and high technical thresholds. With the standardized SoMs and development platforms provided by Forlinx Embedded, which are pre - integrated with the MECHATROLINK - 4 master protocol stack, customers can significantly shorten the development time, focus on the innovation of their own processes and applications, truly achieve ''ready - to - use'', and accelerate the product iteration and launch process.

Among the two key solutions demonstrated by the MECHATROLINK Association at the forum, the ''General IPC + Linux Preempt Solution'' is based on a similar hardware platform concept to that of Forlinx Embedded, showcasing its significant advantage of overcoming the limitations of dedicated hardware and reducing the development threshold. What Forlinx Embedded provides is the foundation for transforming this concept into stable, reliable, and mass-deliverable products.

3. Assisting the Intelligent Upgrade of the Industry

Forlinx Embedded has always been dedicated to providing a strong hardware foundation for industrial intelligence. This cooperation with the MECHATROLINK Association is not only a complement of the two parties' technological advantages but also a forward - looking response to market demand. By combining advanced industrial network communication protocols with self - controllable embedded hardware platforms.

In the future, Forlinx Embedded will continue to cooperate closely with the MECHATROLINK Association and other industry partners, continuously optimize the integrated ''protocol + hardware'' solution, jointly address new challenges in the fields of industrial communication and motion control, and drive the digital, networked, and intelligent upgrade of intelligent manufacturing openly and cooperatively, contributing to the development of the global industrial automation industry.

In 2025, Forlinx Embedded continued to strengthen its role in the global embedded ecosystem through long-term silicon partnerships and reliable industrial-grade platforms. As an NXP Gold Partner and official i.MX 95 ecosystem partner, Forlinx works closely with NXP to support secure, safety-ready edge computing. At the same time, deeper cooperation with Rockchip and Allwinner Technology has expanded Forlinx’s portfolio of cost-effective solutions for edge AI and industrial control.

Throughout the year, Forlinx Embedded showcased these platforms at major industry exhibitions—from Nuremberg to Guangzhou—demonstrating how advanced processors can be transformed into stable, deployable edge AI systems.

Below is a recap of Forlinx Embedded’s key products and milestones in 2025.

Flagship Platforms for Industrial Edge & AI

FET-MX9596-C System on Module (NXP i.MX 95)

The FET-MX9596-C represents Forlinx Embedded’s next-generation high-end industrial SoM, designed for demanding edge applications requiring sophisticated processing and hardware security.

• Processor Core: Built on NXP’s i.MX 95, featuring a heterogeneous architecture—Six ARM Cortex-A55 application cores. One Cortex-M7 real-time core. One Cortex-M33 security core.

• AI & Graphics: Integrates a 2 TOPS NPU for AI acceleration and an ARM Mali-G310 GPU for 3D/2D graphics.

• Vision Support: Built-in ISP supporting 4K@30fps video and dual MIPI-CSI cameras.

• Target Use Cases: Well-suited for industrial controllers, robotics, smart energy, and safety-critical edge systems, leveraging NXP EdgeLock security features and rich industrial interfaces.

FET1126B-S/FET1126BJ-S System on Module (Rockchip RV1126B/RV1126BJ)

The FET1126B-S/FET1126BJ-S SoM is a low-power, cost-effective solution optimized for edge-side AI computing.

• Processor Core: Rockchip RV1126B/RV1126BJ (4x Cortex-A53@1.6GHz/1.3GHz)

• Vision & Intelligence: Includes a 3 TOPS NPU with RKNN support, 4K video decoding, and a 12M ISP. These features enable efficient execution of AI models for face detection, safety helmet recognition, fire/smoke alarms, and area intrusion detection.

• Industrial Ruggedness: Supports -40°C~+85°C operation, delivering excellent reliability and environmental adaptability in complex settings. Rigorously tested by Forlinx Embedded Laboratory for industrial-grade stability, it ensures reliable performance with a 10-15 year longevity for consistent long-term supply.

• Target Use Cases: Optimized for power transmission, intelligent transportation, gas station monitoring, smart construction sites, and intelligent warehousing.

FET-MX8MPQ-SMARC System on Module (NXP i.MX 8M Plus)

The FET-MX8MPQ-SMARC is an adaptive SoM optimized for AI-enabled HMI and vision-driven edge applications, utilizing the standardized SMARC 2.1 form factor.

• Processor Core: NXP i.MX 8M Plus Quad-Plus (4× Cortex-A53@1.6GHz + Cortex-M7@800 MHz).

• AI & Vision: Includes a 2.3 TOPS NPU and ISP to deliver powerful machine learning, vision, and advanced multimedia processing.

• Form Factor: Built to the SMARC 2.1 standard (82 × 50 mm), offering plug-and-play compatibility with SMARC carriers.

• Target Use Cases: Provides a balanced platform for smart manufacturing, medical devices, and intelligent terminals requiring high-reliability compute and long-term availability.

FCU3501 Embedded Computer (Rockchip RK3588)

The FCU3501 is a high-performance, rugged, and fanless embedded computer, delivered as a ready-to-deploy solution for intensive edge AI workloads.

• Processor Core: Rockchip RK3588, featuring an octa-core architecture (4 x Cortex-A76 up to 2.4GHz + 4 x Cortex-A55 up to 1.8GHz).

• AI Performance (32 TOPS NPU): Offers native 6 TOPS NPU performance, with optional AI acceleration via a Hailo-8 M.2 module (26 TOPS).

• Multimedia: Supports 8K video encoding/decoding.

• Industrial Design: Fanless, passive cooling design ensures stable, reliable operation, verified through rigorous environmental and EMC testing.

• Target Use Cases: Ideal for demanding edge scenarios such as machine vision, intelligent transportation, and AI gateways—delivering performance without custom carrier development.

Cost-Effective & Scalable Industrial Platforms

Rockchip RK3506 Series SoMs

The RK3506J is a high-performance, triple-core Cortex-A7 application processor known for its excellent power consumption and heat dissipation, specifically designed for intelligent industrial control and IoT.

(1) FET3506J-C System on Module

Designed for board-to-board connectivity, the FET3506J-C offers a robust industrial SoM solution with low power consumption and rich I/O. It fits well into applications that require stable mass production, long lifecycle support, and tight mechanical integration.

• 0.7W ultra-low power, supports fanless design and +85°C industrial temperature.
• Compact 29×40mm size with 2mm connector, ideal for small embedded devices.
• Rich industrial I/O, including 2× CAN-FD, UART, RMII, and display interfaces.
• High-speed DSMC bus, enables fast FPGA-to-ARM communication.
• Flexible FlexBUS interface, supports ADC, DAC, camera, QSPI LCD.
• Linux 6.1 + LVGL 9.2, supports AMP and real-time system development.
• 10~15 years supply, ensuring stability for long-life industrial projects.

(2) FET3506J-S System on Module

Featuring stamp-hole design, the FET3506J-S is optimized for cost efficiency and compact designs, supporting rapid prototyping as well as large-scale deployment. It is particularly suitable for industrial control, gateways, and IoT nodes where space and BOM cost matter.

• Edge connector, all pins are led out
• 22nm advanced process
• Display interfaces: MIPI DSI, RGB
• Rich industrial bus interfaces: RMII, CAN-FD, FLEXBUS, DSMC etc
• DSMC can be used to extend PSRAM, FPGA communication
• RM_IO enables matrix configuration for pin functions

(3) OK3506-S12 Mini SBC

The OK3506-S12 Mini SBC is built for rapid evaluation and cost-sensitive development. Compact and developer-friendly, it enables fast function verification and early-stage testing for RK3506-based applications, making it ideal for proof-of-concept projects and entry-level edge designs.

FET536-C System on Module (Allwinner T536)

The FET536-C is a cost-effective, real-time focused SoM based on the Allwinner T536 industrial-grade processor.

• Processor Core: Quad-core Cortex-A55 @ 1.6 GHz and the XuanTie E907 RISC-V core.
• Real-Time & Security: Supports 2 TOPS NPU, secure boot, full-path ECC, AMP, and Linux-RT for deterministic performance.
• Connectivity: Wide range of interfaces including CAN-FD, Ethernet, ADC, and LocalBus.
• Target Use Cases: An excellent choice for cost reduction in key fields such as concentrators, FTU, DTU, charging piles, transportation, robotics, and industrial control that demand reliable, real-time control over raw compute performance.

FET153-S System on Module (Allwinner T153)

The FET153-S is an industrial SoM targeted for intelligent automation applications, such as programmable logic controllers (PLCs) and human-machine interface (HMI).

• Processor Core: Allwinner T153 (4x Cortex-A7@1.6GHz+RISC-V E907@600MHz).
• Vision: Its integrated image signal processor and display engine enable clear real-time visual feedback for managing intricate manufacturing processes.
• Excellent connectivity: It features three Gigabit Ethernet interfaces, two CAN_FD interfaces, and 16-/32-bit local bus, supporting high-throughput networking for complex data-driven use cases.

Special Platform: Ecosystem & Evaluation Support

NXP FRDM i.MX93

As part of the broader NXP ecosystem, the FRDM-IMX93 board is a low-cost and compact platform designed to show the most commonly used features of the i.MX 93 Applications Processor in a small and low cost package. The FRDM-IMX93 board is an entry-level development board, which helps developers to get familiar with the processor before investing a large amount of resources in more specific designs.

Ecosystem Collaboration, Shared Growth

Collaboration and mutual success remained a core theme for Forlinx Embedded in 2025. Throughout the year, we worked closely with leading silicon vendors including NXP, TI, Rockchip, Allwinner, and Nuvoton, co-hosting ecosystem seminars, joining distributor workshops to share critical technical insights.

These efforts were recognized with honors such as Rockchip Annual Outstanding Partner and Allwinner Certified Ecosystem Partner. In parallel, we partnered with industry players like Phoenix Contact to deliver integrated hardware-software solutions, accelerating intelligent transformation across industrial sectors.

Global Footprint, Strengthening Industry Presence

From Nuremberg, Germany to Guangzhou, China, from early spring to late autumn, Forlinx Embedded participated in seven major industry exhibitions in 2025. By engaging with partners across regions and industries, we shared market insights and innovation trends, delivering more robust, intelligent, and scalable embedded solutions for diverse applications.

Through initiatives such as the Edge AI Technology Forum and Embedded Technology Salons, we used technology as a bridge—bringing customers and partners closer to cutting-edge AI and embedded system innovations.

Deepening AI Deployment at the Edge

In 2025, Forlinx Embedded accelerated the adoption of AI at the edge across real-world applications. From driver fatigue detection and battery life prediction, to on-device deployment of DeepSeek and multimodal AI fusion, we embedded intelligence directly into control platforms.

By focusing on real-time performance, low power consumption, and high reliability, we continue to co-build a smarter future together with partners across the embedded and AI ecosystem.

Looking Ahead

Across all 2025 releases, a consistent philosophy stands out: long product lifecycles, industrial-grade reliability, and scalable hardware platforms that reduce integration risk. Whether customers are building next-generation AI edge systems or long-running industrial controllers, Forlinx Embedded’s 2025 portfolio provides a clear path from evaluation to mass production—without compromising stability, supply continuity, or maintainability.

Forlinx Embedded RK3576 development board

1. Overview

This article introduces a method to pull up the GPIO during the U-Boot stage on the Forlinx Embedded OK3576-C development board by modifying the kernel device tree. As a high-performance embedded platform based on the RK3576 processor, the OK3576-C integrates a quad-core Cortex-A76 and a quad-core Cortex-A55 architecture, providing powerful computing support for scenarios such as industrial control and edge computing. Its flexible hardware configuration and complete software ecosystem enable such low-level hardware control requirements to be achieved through standardized device tree configuration without complex low-level code modification.

For application scenarios that require controlling peripherals during the early stage of system startup (U-Boot stage), such as enabling industrial sensors and resetting peripherals, the method presented in this article can effectively simplify the development process. If more precise control of the GPIO is required (such as precise timing adjustment and multi-state switching), direct modification of the U-Boot code is still necessary.

This article is verified based on Forlinx's official document ''OK3576 - C_Linux6.1.84_User Materials_R2'', which includes a comprehensive hardware manual, driver development guide, and sample code. This document is available on the Forlinx Embedded official website. This method can be referred to for other RK platforms (such as RK3568 and RK3588) or other Linux versions, but the pin definitions and device tree nodes need to be adjusted according to the specific hardware manual.

2. Objective Definition

Before modifying the U - Boot or kernel device tree, it is necessary to clarify the rationality of the requirements to avoid ineffective development. The main focus is to assess whether "pulling up the GPIO during the U-Boot stage" can satisfy the hardware design requirements. The critical factor is the GPIO level state at the initial power-on phase of the hardware.

If the hardware circuit necessitates ''pulling up the GPIO immediately after power-on'' (for example, for relay control or activating key modules), and the initial state of the target GPIO after power-on is low, this issue cannot be addressed through software solutions. The hardware design needs to be updated to select a GPIO pin that defaults to a high level after power-on, as determined by the hardware circuit. This is important because U-Boot typically begins operating 2 seconds after power-on, and the software cannot control the GPIO level before U-Boot starts.

2.1 GPIO Pin Selection Method

The Forlinx Embedded RK3576 development board offers abundant GPIO resources across various groups, catering to the control requirements of multiple peripherals. The following methods need to be used to confirm the initial power - on state and functional compatibility of the GPIO pins:

• To check the hardware design documentation, refer to the Forlinx RK3576 development board, which includes a comprehensive pin function table and a schematic diagram of the carrier board. You can contact Forlinx Embedded's online customer service to obtain the download link for this documentation. Each pin is clearly labeled with its default level, direction (input/output), and voltage domain (e.g., 3.3V, 1.8V).

• Measure and verify using a multimeter or oscilloscope to determine the pin level at power-on. Record the initial state (high or low) and the stabilization time.

Figure1: RK3576 Development Board Interface Diagram

Figure2: RK3576 Development Board Interface Diagram

This method can be applied in various scenarios for the OK3576-C development board, including reset control for industrial sensor modules, enabling power-on for peripherals, and hardware initialization for custom expansion boards. It does not require immediate activation after power-on; instead, it simply needs the GPIO level to stabilize before the kernel driver is loaded during the U-Boot stage. The RK3576 development board supports wide - temperature operation (-40°C to 85°C), which is particularly suitable for such hardware control requirements in industrial environments.

3. Modification and Verification Methods

This section uses GPIO2_B4, the PCIE0_PERSTn pin from the PCIe interface on the OK3576-C - C carrier board, as an example to detail the steps for modifying the device tree and verifying the methods. The RK3576 development board features a PCIe 3.0 interface that allows for the expansion of high-speed peripherals. This article explains how to control the reset state of PCIe devices during the initial phase of system startup.

3.1 Pre - preparation

• Hardware: OK3576 - C development board (SoM + carrier board), PCIe interface device (optional), multimeter, debugging serial cable.

• Software: Linux 6.1.84 SDK, cross - compilation toolchain, serial terminal tool (such as SecureCRT, MobaXterm). The SDK contains complete compilation scripts and sample code.

• Measurement point: GPIO2_B4 corresponds to the R354 resistor on the carrier board (between the PCIe socket and the electrolytic capacitor).

3.2 Verification of the Original State

First, flash the original factory default image to verify the original level change of GPIO2_B4:

1. Connect the debugging serial cable and open the terminal tool (baud rate 115200, 8N1). The Forlinx Embedded RK3576 development board has a debugging serial port led out by default, which is convenient for development and debugging.

2. Power on the development board, observe the serial port printing, and record the level change of GPIO2_B4 (measured by a multimeter).

3. By default, this pin will be pulled up after the kernel starts, and remains low during the U - Boot stage.

Figure 3: OK3576 Development Board (the red frame marks the PCIe interface area)

3.3 Entering Uboot Command Line

When the following prompt appears at the serial port terminal during power-on, press CTRL + C to enter the uboot command line (at this time, uboot does not transfer control to the kernel, and the GPIO level at the uboot stage can be measured):

Hit key to stop autoboot('CTRL+C'): 0 
---------------------------------------------
		0:Exit to console
		1:Reboot
		2:Display type
---------------------------------------------

The uboot of the Forlinx Embedded RK3576 development board has been optimized by Forlinx, providing rich debugging commands and configuration options, and supporting the configuration of various startup parameters through environment variables, which is convenient for developers to perform low - level hardware debugging.

3.4 Theoretical Basis (RK U - Boot DTB Mechanism)

According to the ''Kernel - DTB'' section of RK's official manual ''Rockchip_Developer_Guide_UBoot_Nextdev_CN.pdf,'' the RK platform supports the use of the kernel DTB to initialize U-Boot peripherals. The core mechanism is as follows:

The native U - Boot only supports using its own DTB. The RK platform adds support for the kernel DTB mechanism, that is, using the kernel DTB to initialize peripherals. The main purpose is to be compatible with peripheral board - level differences, such as power, clock, and display.

The functions of the two are as follows:
U - Boot DTB: Responsible for initializing core devices such as storage and the printing serial port;
Kernel DTB: Responsible for initializing devices other than storage and the printing serial port (such as GPIO, I2C, and PCIe);

During U - Boot initialization, the U - Boot DTB is first used to complete the initialization of storage and the printing serial port, and then the Kernel DTB is loaded from the storage and used to continue initializing the remaining peripherals. The code implementation of the Kernel DTB is in the function: init_kernel_dtb() 。

Developers usually do not need to modify the U-Boot DTB, except when changing the printing serial port. The defconfig included in the SDKs released by each platform has already enabled the kernel DTB mechanism. So usually, for DTS modifications of peripherals, users should modify the kernel DTB.

The SDK of the RK3576 development board enables this mechanism by default, allowing developers to control the hardware during the uboot stage by modifying the kernel device tree, greatly simplifying the development process.

3.5 Kernel Device Tree Modification (Core Step)

By modifying the kernel device tree and adding a GPIO pull - up node, the GPIO can be controlled during the U - Boot stage. The specific modifications are as follows (based on the arch/arm64/boot/dts/rockchip/OK3576-C-common.dtsi file in the SDK):

  --- a/arch/arm64/boot/dts/rockchip/OK3576-C-common.dtsi
  +++ b/arch/arm64/boot/dts/rockchip/OK3576-C-common.dtsi
  @@ -428,6 +428,16 @@ wifi_ext_clk: wifi_ext_clk {
  pinctrl-0 = <&net_5g_pwr_gpio>;
  status = "okay";
  };
  +
  + gpio2b4_high_test {
  + compatible = "regulator-fixed"; // Compatible with fixed voltage regulator drivers (for GPIO pull-up)
  + gpio = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>; // Specify GPIO2 _ B4, active high
  + enable-active-high; // Enable signal is high
  + regulator-boot-on; //Enabled at system boot (uboot phase in effect)
  + regulator-always-on; // Keep normally on (prevent being turned off by subsequent drive)
  + status = "okay"; // Enable the node
  + };
  +
  };
  @@ -1164,7 +1174,7 @@ rgmii_phy1: phy@2 {
  };
  &pcie0 {
  - reset-gpios = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>; // Original PCIe reset GPIO definition
  + //reset-gpios = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>; // Comment out to avoid pin conflict
  rockchip,skip-scan-in-resume;
  pinctrl-names = "default";
  status = "okay";

The device tree for the RK3576 development board has been optimized to clearly separate the configurations of different functional modules, making it easier for developers to make targeted modifications. The above modification method is also applicable to the control requirements of other GPIO pins. You just need to replace the corresponding GPIO group and pin numbers.

3.6 Compilation and Verification

1. Compile the kernel: Refer to the ''OK3576 - C Linux Compilation Manual'' provided in the SDK. You can use the compilation script (build.sh) optimized by Forlinx to quickly complete the compilation and generate a new boot.img (including the modified device tree).

2. Flash the image: Use an RK flashing tool (such as RKDevTool) to separately flash the boot.img to the development board. The Forlinx Embedded RK3576 development board supports multiple flashing methods such as TF card, USB, and network, which facilitates development and debugging.

3. Level verification:

   • After power - on, immediately use a multimeter to measure the voltage levels across the R354 resistor.

   • Enter the uboot command line (CTRL + C) and observe whether the voltage level remains high (if it is high, the modification takes effect).

   • Continue to start the kernel and confirm that the voltage level remains stable (without abnormal drops).

4. Advantages and Summary of the OK3576 - C Development Board

The OK3576-C is a high-performance development platform created by Forlinx Embedded and is based on the RK3576. It delivers robust computing capabilities while enabling low-level hardware control through well-designed hardware and software support. This method employs the kernel Device Tree Blob (DTB) mechanism in RK U-Boot. It enables the adjustment of the GPIO level during the U-Boot phase without requiring any modifications to the U-Boot code. This approach is suitable for scenarios where control accuracy is not a high priority.

Along with the GPIO control function discussed in this article, the OK3576 offers several additional advantages, making it an excellent choice for industrial control, smart devices, and other applications.

• Powerful processing performance: It features a quad - core Cortex - A76 (2.2GHz) + quad - core Cortex - A55 (1.8GHz) architecture, supporting the NEON and FPU instruction sets to meet complex computing requirements.

• Rich peripheral interfaces: It includes high - speed interfaces such as PCIe 3.0, SATA 3.0, dual - gigabit Ethernet, MIPI - CSI, and MIPI - DSI, supporting the expansion of various peripherals.

• Complete software ecosystem: It supports operating systems such as Linux and Android, and provides a complete SDK and development documentation, reducing the development threshold.

• Industrial - grade design: It supports a wide temperature range (- 40°C to 85°C) and has strong anti - interference ability, suitable for industrial environments.

• Professional technical support: It provides full - process technical support for customers from hardware design to software development.

The key points of this method are as follows:

• Hardware priority: Confirm the initial state of the GPIO after power - on to avoid conflicts between the requirement of ''raising the level immediately after power - on'' and the software control timing.

• Node configuration: Use the regulator - fixed compatible driver and ensure it takes effect during the U - Boot phase through regulator - boot - on.

• Conflict avoidance: Comment out other references to the same GPIO in the original device tree (such as PCIe reset - gpios) to prevent pin multiplexing conflicts.

• Actual measurement verification: It is necessary to confirm the stability of the GPIO voltage level during the U - Boot and kernel phases using a multimeter or oscilloscope.

Forlinx Embedded provides complete technical materials and example codes for the OK3576-C development board, including hardware design manuals, driver development guides, and application development examples.

Ready to take your project further? Talk to our engineers for technical insights and tailored support.

Contact our engineers now

On December 10, 2025, Phoenix Contact's ''SoftPLC & vPLC Open Automation Software Technology Seminar'' was held in Nanjing. The seminar focused on the main theme of "Integrating 4T Technologies in the Digital Industrial Era." It brought together over a hundred leading companies and research institutions to discuss innovative practices involving cutting-edge technologies such as open automation, industrial AI, and edge computing.

Forlinx Embedded, a key ecological partner of Phoenix Contact, was invited to participate in the seminar. The person in charge of Forlinx Embedded's market ecosystem delivered a keynote speech titled ''Combination and Application of Embedded SoMs and vPLCnext.'' In this presentation, he provided a comprehensive overview of the company's latest achievements in the field of open automation.

Embedded SoMs Empower vPLCnext to Break the Boundaries of Industrial Control

As the digital industry rapidly evolves, the deep integration of Operational Technology (OT), Information Technology (IT), Communication Technology (CT), and Data Technology (DT) is transforming the industrial control architecture. As a next-generation open virtual control software, Phoenix Contact's Virtual PLCnext Control, centered around ''software-defined control,'' overcomes traditional technological barriers with a flexible architecture and establishes a compatible base platform for the industrial ecosystem.

The person responsible for Forlinx Embedded's market ecosystem highlighted in the keynote speech that industrial control is transitioning from being hardware-dominated to a blend of both hardware and software. As the foundational hardware, the performance and openness of embedded SoMs significantly impact the innovation efficiency of higher-level applications.

At the seminar, the StarterKit jointly developed by Forlinx Embedded and Phoenix Contact attracted attention. It is a product designed based on Forlinx Embedded's SoM and can directly run vPLCnext. Previously, the two parties had adapted SoftPLC & vPLC based on multiple SoM products.

Collaborating with Phoenix Contact to Create Benchmark Industry Applications

The partnership between Forlinx Embedded and Phoenix Contact represents not just a technical complement but also a profound ecological integration. By sharing R & D resources and conducting joint market promotion, the open automation standard is being promoted from ''proof of concept'' to ''large - scale implementation''. This collaboration brings innovative changes to industrial automation and supports digital transformation and intelligent manufacturing for enterprises.

The essence of open automation is found in its "openness," which necessitates collaboration among hardware suppliers, software developers, and system integrators to drive innovative solutions together. Forlinx Embedded is committed to strengthening its partnership with companies like Phoenix Contact. By focusing on the technological advancement and ecological growth of embedded SoMs within an open ecosystem, Forlinx aims to deliver more efficient and secure control solutions to customers worldwide.

Note: Some pictures are from the official sources of Phoenix Contact.

High and Low Temperature Tests are methods for evaluating product performance by simulating extreme environments. In simpler terms, it involves putting products through an "ice and fire" test. It creates extreme temperature environments by placing samples in preset high-temperature, low-temperature, or temperature-cycling conditions to evaluate their adaptability, stability, and reliability.

For Forlinx Embedded, high and low temperature tests are a very important part of physical environmental tests. This is not intended to "deliberately torture" the products; rather, it aims to verify their performance in various temperature scenarios in advance. Following these tests, products will be better equipped to withstand harsh environments in real-world applications. The more comprehensive the tests, the more reliable the products will become.

Temperature Levels: Different Scenarios, Different Standards

Product usage scenarios vary widely, resulting in different requirements for high and low-temperature tolerance. In the industry, products can be broadly categorized into commercial-grade, extended commercial-grade, industrial-grade, and automotive-grade based on their temperature adaptation ranges. Each grade adheres to distinct high and low-temperature testing standards

Commercial-grade: This category primarily involves daily consumer electronics, such as home routers and TVs. The temperature range typically spans from -20°C to 0°C (low temperature) and around 70°C (high temperature). The test conditions are relatively lenient, simulating the temperature scenarios encountered in daily life.

Extended commercial-grade: Building on the commercial-grade standards, this category sets higher requirements for specific consumers or usage scenarios.The temperature range extends to -25°C to -10°C (low temperature) and 70°C to 80°C (high temperature).

Industrial - grade: Designed for control equipment used in industrial production and electronic components in machine tools, this grade further expands the temperature range to -40°C to -20°C (low temperature) and 70°C to 85°C (high temperature). Products in this category must adapt to complex environments, such as factory workshops and outdoor industrial sites, with exceptionally high demands for product stability.

Automotive-grade: Given the harsh conditions found in vehicle environments, this grade covers a temperature range of -55°C to -40°C (low temperature) and 85°C to 125°C (high temperature), with varying requirements for different parts. For instance, components inside the vehicle cabin generally need to withstand temperatures of 85°C, while those in the engine compartment must endure up to 125°C. The testing protocol involves simulating high- and low-temperature cycles to ensure that products can withstand extreme temperature fluctuations during vehicle operation.

It's worth noting that the products offered by Forlinx Embedded primarily fall into three temperature adaptation categories: industrial-grade, commercial-grade, and extendedcommercial-grade.

Standardized Tests: Scientific and Rigorous, Based on Evidence

High and low-temperature tests are not conducted arbitrarily; rather, they must adhere to a series of strict standards. Different industries and products have clearly defined standard requirements, including GB/T 2423.1-2008, GB/T 2423.2-2008, IEC 60068-2-1:2025, IEC 60068-2-2:2025, GB/T 15153.2-2000, and IEC 60870-2-2, among others The test conditions—such as temperature range, duration, and heating and cooling rates—must be strictly followed according to these standards.

These guidelines ensure the scientific rigor of the high and low-temperature tests.

Test Process: Precise Operations, Step by Step

High and low-temperature tests are carried out in a specialized ''high and low-temperature test chamber.'' The process is divided into three stages: preparation, testing, and completion, with each stage requiring precise operations to avoid errors.

1. Preparation Stage:

It is essential to verify that the sample corresponds to the model being tested. Additionally, ensure that all tools and connection cables are securely attached, paying close attention to cable lengths. The sample should be tested with the startup program to confirm that the feedback results meet the specified requirements. If conducting a cyclic test, at least two rounds of testing should be performed to verify the method's effectiveness.

A testing engineer conducting high and low temperature tests

2. Test Stage:

First, place the samples into the test chamber, allowing for a 10-cm gap between samples and between the samples and the chamber walls to ensure proper ventilation.

The specific experimental process proceeds as follows:

1. Power on the sample, run the test program, and start data logging;

2. Close the chamber door, set the low temperature (confirm the setting), and begin timing for 24 hours after reaching the target temperature, inspecting every 4 hours;

3. After turning off the sample power for 30 minutes, power it on five times at 10-minute intervals and start it ten times at 1-minute intervals without turning it off, recording the results;

4. Power the sample back on and run the test program;

5. Set the high temperature (verify the setting), time for 24 hours after reaching the target temperature, and conduct inspections every 4 hours;

6. After turning off the sample power for 30 minutes, power it on five times at 10-minute intervals and start it ten times at 1-minute intervals without turning it off, recording the results;

7. Back up the records, allow the chamber to cool to room temperature, and remove the samples after 10 minutes.

3. End Stage:

Following the test, a final inspection of the samples is necessary, including evaluations of appearance, function, and performance parameters, to determine if they meet product specifications.

Finally, compile the data into a report: organize the temperature data, detection results, and sample statuses during the test into a ''High and Low-Temperature Test Report.''

Conclusion: Guarding Product Reliability with Stringent Tests

Although high and low-temperature tests may seem like they are "making things difficult" for products, they actually serve as the "guardians" of product reliability. By using extreme environments to simulate real-world challenges according to different grade requirements, these tests help identify potential issues in advance, ensuring that products can operate stably across various temperature scenarios.

For Forlinx Embedded, clearly defining the temperature grade of products and conducting corresponding high and low-temperature tests is not only a commitment to product quality but also a responsibility to users in future developments, Forlinx will maintain a rigorous and scientific approach to provide comprehensive quality assurance for each product.

In IoT and edge computing projects, the demand for offline and localized text-to-speech (TTS) functionality is increasing. Piper, a fast and open-source neural network TTS engine, perfectly meets this demand.

Today, step by step instructions will be provided to deploy Piper on the Forlinx Embedded OKMX8MP development board and achieve high-quality local voice synthesis. This tutorial includes complete steps, code examples, and troubleshooting for common issues to help you get started easily!

Preparation

Required Files

piper_bin.tar (about 22.6 MB)

Piper executable files and core dependent libraries (e.g., libonnxruntime, libespeak-ng).

piper-voices_cut.tar (about 114.4 MB)

Trimmed Chinese and English voiceprint model libraries.

Development Environment

Forlinx OKMX8MP development board (with Linux system flashed).

Terminal access to the development board via SSH or serial port.

Tools for file transfer (e.g., USB drive, SCP).

Detailed Deployment Steps

Step 1: Deploy Piper Executable Files

1. Copy files to the development board

Copy piper_ok.tar to any directory on the development board (take /root as an example):
# Assume the file has been copied to /run/media/sda1 via USB drive
root@OK8MP:~# cp /run/media/sda1/piper_ok.tar ./
root@OK8MP:~# sync

2. Extract the files

Enter the working directory and extract the files. The -m parameterpreserves the file modification time.

root@OK8MP:~# tar -xvf piper_ok.tar -m

After extraction, the directory structure of piper is as follows:

piper/
├── piper              # Core executable file
├── lib*.so*           # All dynamic link libraries required for running
├── espeak-ng-data/    # Voice data
└── *.ort               # ONNX-related model files

3. Perform a preliminary test

Try to run the piper program directly:

root@OK8MP:~/piper# ./piper
# Expected error output: "Model file doesn't exist"

Note: It's normal to get an error at this point because no voiceprint models have been specified yet. This verifies that the program itself can run.

Step 2: Deploy the Voiceprint Model Library

1. Extract the voiceprint library

Extract piper-voices_cut.tar to the /opt directory, a common locationfor optional software.

root@OK8MP:/opt# tar -xvf /path/to/piper-voices_cut.tar -m

After extraction, you'll get Chinese voiceprint model files, forexample:

/opt/piper-voices_cut/medium_zh/zh_CN-huayan-medium.onnx.

2. Create a Chinese test text

Create a text file named zh_test.txt and write the content to beconverted.

# Use the cat command to quickly create a file
root@OK8MP:~/piper# cat > zh_test.txt << EOF
Welcome to use Forlinx Embedded OKMX8MP development board:
This is a text-to-speech local test.
EOF

Note: Ensure that the text file uses UTF-8 encoding to avoid Chinesecharacter garbling.

Step 3: Run Text-to-Speech and Play

1. Execute the conversion command

In the piper directory, execute the following command to convert thetext to an audio file zh_audio.mp3.

root@OK8MP:~/piper# ./piper \
  -m /opt/piper-voices_cut/medium_zh/zh_CN-huayan-medium.onnx \
  --output_file zh_audio.mp3 < zh_test.txt

Parameter description:

Successful output example:

[piper] [info] Loaded voice in 1.99 second(s)
[piper] [info] Real-time factor: 0.61 (infer=1.72 sec, audio=2.82 sec)
[piper] [info] Terminated piper

-m: Specify the voiceprint model file to be used.

--output_file: Specify the name of the output audio file.

< zh_test.txt: Redirect the input text from the file.

2. Play the audio file

Use the gst - play - 1.0 tool to play the generated audio.

root@OK8MP:~/piper# gst-play-1.0 ./zh_audio.mp3

Common Questions and Solutions (Q&A)

Question 1:

Error message: ''Model file doesn't exist''

Solution: Check if the path of the voiceprint model after the -m parameter is correct. Ensure that piper - voices_cut.tar has been successfully extracted to the /opt directory and the file permissions are normal.

Question 2:

Unable to directly input Chinese on the command - line or garbled characters appear.

Solution: It is highly recommended to save the Chinese content in a text file with UTF - 8 encoding and then input it through redirection <. This is the most reliable method. (For other languages, refer to the same method and save the text in the corresponding encoding format.)

Question 3:

Error message: ''Error while loading shared libraries''

Solution: This is because the program cannot find the dependent .so library files. The problem can be solved by adding the current directory to the library search path:

export LD_LIBRARY_PATH=$LD_LIBRARY_PATH:

and then execute the ./piper command again.

Expansion and Exploration

Direct input on the command - line:

For simple English tests, you can use the echo pipeline:

echo "Hello from OKMX8MP board." | ./piper -m <English model path> -f output.wav

Change different voices:

piper - voices provides a large number of voiceprint models. Easily switch by HuggingFace

Model Library downloading other .onnx models and specifying them in the -m parameter.

Refer to:

• Piper GitHub Release： piper_arm64.tar.gz

• Voiceprint model library (Hugging Face)： rhasspy/piper-voices

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As intelligent processes increasingly impact the industrial manufacturing sector, factory workshops are transitioning from an ''experience-based'' approach to a ''data-empowered'' model. The challenges of manual visual inspection in detecting defects on production lines, the gaps in monitoring personnel behavior, and the slow response times in tracking equipment status are significant obstacles. These issues continuously hinder improvements in both production efficiency and quality.

Forlinx Embedded FCU3501 AI edge computing box offers several advantages, including a high-reliability architecture, robust computing power, and easy deployment. This integrated system is designed for visual quality inspection and safe production in smart factories, providing a vital solution for industries facing challenges in transformation. It serves as a key driving force to overcome existing obstacles.

1. Real Challenges in the Industrial Field

The traditional manufacturing environment is facing multiple pressures: production lines need to accurately identify tiny defects, safe production requires real-time monitoring of personnel behavior, and the status of equipment needs to be visible and controllable. In complex working conditions such as high temperature, dust, and oil pollution, conventional computing devices are difficult to operate stably, and cloud-based solutions are restricted by network latency. Factories urgently need AI computing devices that can process multiple video streams in real-time at the edge and adapt to harsh environments.

2. Hard - Core Strength Designed for Industry

Forlinx Embedded FCU3501 AI edge computing box is based on the Rockchip RK3588J industrial-grade processor, with a built-in NPU computing power of 6 TOPS, and supports the expansion of a 26 TOPS computing power card through the M.2 interface, achieving a total computing power of up to 32 TOPS. This computing power level is sufficient to support a single unit to concurrently process 16 x 1080P industrial camera video streams, meeting the AI processing requirements for real-time video streams in modern factories.

The FCU3501 AI edge computing box features a fanless design that operates effectively in a wide temperature range, from -40°C to +85°C. It is certified by CE and FCC, ensuring reliable performance for 24 hours a day, 7 days a week, even in harsh industrial environments. Its outstanding electromagnetic compatibility allows it to withstand various interferences commonly found in industrial settings, making it ideally suited for such applications.

3. Multiple Values of the Integrated System

The FCU3501 AI edge computing box demonstrates multiple application values in smart factories:

Visual quality inspection on production lines: It can access multiple industrial cameras through dual Gigabit Ethernet and connect additional auxiliary cameras through the USB 3.0 interface. Its powerful computing power analyzes video streams in real - time to detect product defects. At the same time, it can read trigger signals from sensors on the production line through the RS - 485 interface to achieve precise snapshotting.

Equipment status monitoring and early warning: The DI interface can obtain the on - off status or alarm signals of equipment, and the DO interface can control audible and visual alarms. The RS - 232/RS - 485 interface can be used to read the readings of specific industrial instruments. Analysis results and alarms can be wirelessly transmitted to the cloud management platform through the 4G/5G module.

Local monitoring and debugging: The on - site HDMI interface can be connected to a large display screen to display analysis results and monitoring images in real - time. When engineers conduct on - site maintenance, they can perform in - depth system debugging through the DEBUG interface or use WiFi/ Bluetooth for convenient wireless connection and configuration.

Topology Diagram

4. Advantages of the Edge - Cloud Collaborative Architecture

Forlinx Embedded FCU3501 AI edge computing box uses an ''edge-cloud'' collaborative architecture. It performs real-time analysis locally and only uploads structured data and alarm events, significantly reducing bandwidth pressure. This architecture not only ensures real-time performance but also realizes efficient data flow, building a complete digital foundation for factories.

5. Scalable AI Edge Computing Box for the Future

The computing power design of FCU3501 AI edge computing box shows remarkable forward - looking architecture thinking. As the complexity of AI models grows or if more video streams need to be processed, users have the option to upgrade their computing power from 6 TOPS to 32 TOPS by adding an accelerator card. This modular design, which offers "guaranteed basic computing power with the ability to expand for additional value," not only extends the lifecycle of the hardware but also lowers the trial-and-error costs associated with enterprise intelligent transformation.

Today, the FCU3501 AI edge computing box is enhancing production safety with its industrial-grade reliability. It accelerates the adoption of AI through its plug-and-play deployment advantage, while continuously helping manufacturing enterprises build their intelligent competitiveness for the future.

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The emergence of the edge computing era has increased the demands on the AI processing capabilities of terminal devices. This is particularly true in AIoT sectors like intelligent security, industrial vision, and robotics. These applications require not only high-quality image processing capabilities but also efficient AI inference at the edge.

The RV1126B, a mid- to high-end AI vision processing SoC launched by Rockchip in May of this year, is specifically designed to meet this demand. The RV1126B is a significant upgrade to the RV1126 series, featuring 3TOPS of NPU computing power, a dedicated AI-ISP architecture, and comprehensive hardware-level security features. This makes it an ideal choice for intelligent upgrades across various industries.

Additionally, Forlinx Embedded is set to launch a new series of products that are designed and developed based on the RV1126B. Welcome to stay tuned for more updates!

AI Vision Processor with Comprehensive Upgrade in Chip Architecture Performance

As an upgraded version of the RV1126, the RV1126B has achieved significant breakthroughs in multiple key performance indicators.

This chip uses a quad-core Cortex-A53 CPU architecture, with performance more than twice that of chips in the same category, providing strong support for high-performance computing and multi - task processing. Working in tandem with the CPU is Rockchip's self-developed NPU. Its AI computing power has been increased from 2 TOPS to 3 TOPS, supporting weight sparsification, W4A16/W8A16 mixed-precision quantization, and Transformer optimization technology.

This means it can process AI tasks more efficiently and run large language models and multi-modal models with a parameter scale of less than 2B smoothly. The memory bandwidth has been increased from 2166MT/s to 3200MT/s, accelerating data access speed.

Four Core Technologies Build Differentiated Competitive Advantages

The core competitiveness of the RV1126B lies in four technological innovations, which make it stand out in the field of edge AI vision processing.

1. NPU Computing Power Strengths

The built-in 3TOPS NPU of the RV1126B supports INT4/INT8/INT16/FP16 mixed operations and can perform intelligent data processing, voice recognition, and image analysis. It supports deep-learning frameworks such as TensorFlow, TensorFlow Lite, Pytorch, Caffe, and Onnx, meeting the edge-computing AI application needs of most terminal devices.

2. AI-ISP and AOV 3.0

The RV1126B integrates a dedicated AI-ISP hardware, which breaks through the computing power bottleneck of traditional solutions.

Its core advantage is that the AI-ISP can run independently without occupying the resources of the general 3T computing power NPU. Combined with the AI Remosaic technology, it can achieve ''day-night dual-mode adaptation'', outputting ultra-high-definition images during the day and maintaining clear imaging under ultra-low illumination at night.

The AOV 3.0 technology features a low-power audio event wake-up function, enabling 24/7 all-weather audio-video monitoring and real-time detection of abnormal sound sources, including dog barks, broken glass, and gunshots. The device's power consumption is as low as about 1mW in standby mode, ensuring vigilance while being highly energy-efficient.

3. Video Processing Capability

The RV1126B integrates an intelligent encoding engine, supporting 8-megapixel 45FPS ultra-high-definition encoding.

Through the dynamic bit-rate optimization technology, it can save 50% of the bit-stream compared with the traditional CBR mode, doubling the recording time in the same storage space.

The chip also has hardware-level 6-DOF digital anti-shake, which can accurately identify and eliminate high-frequency jitter.

Its binocular/quad-camera panoramic dynamic stitching technology enables multi-camera stitching products to avoid image tearing and provides a super-wide-angle view.

4. Security Performance

The RV1126B chip has a built-in national-level security solution, supporting SM2/SM3/SM4 encryption algorithms. Simultaneously, the chip integrates TrustZone security isolation technology along with a keyladder key management system, creating a comprehensive security protection framework that covers data collection, storage, and the safeguarding of AI algorithm models.

Ideal Choice for Multi-Scenario Intelligent Terminal Solutions in Various Industries

The powerful features of the RV1126B enable it to show broad application prospects in many industry applications.

Intelligent Security Field: The combination of the 3TOPS computing power NPU and the dedicated AI-ISP hardware of the RV1126B enables accurate target object recognition. Combined with the ''day-night dual-mode adaptation'' achieved by the AI Remosaic technology, it can maintain clear imaging under ultra-low illumination. The AOV 3.0 technology can detect abnormal sound sources in real-time, supporting 24/7 all-weather audio-video monitoring.

Industrial Vision Application:Benefiting from the hardware-level 6-DOF digital anti-shake technology of the RV1126B, it can accurately identify and eliminate high-frequency jitter. The binocular and quad-camera panoramic dynamic stitching technology allows multi-camera stitching products to minimize image tearing, providing stable and clear visual information for industrial vision, thus facilitating quality inspection and defect identification in production processes.

Robotics Field: The 3TOPS computing power of the RV1126B chip can run large language models and multi-modal models with a parameter scale of less than 2B smoothly. This provides robots with enhanced image semantic understanding and better cross-modal information fusion capabilities, enabling them to perceive their environment more effectively and perform tasks.

Intelligent Vehicle System: The intelligent vehicle system can also benefit from the powerful performance of the RV1126B. Its rich connection interfaces and high-efficiency features can meet the high requirements of the vehicle system for real-time performance and reliability.

In summary, the mass supply of the RV1126B AI chip, which combines high performance, low power consumption, security, and stability, will serve as a significant driving force for intelligent upgrades across various industries. From intelligent security to industrial vision and robotics, the RV1126B, with its outstanding computing efficiency and innovative design, is creating new possibilities for edge intelligent terminals.

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In today's rapidly evolving landscape of industrial automation and edge computing, equipment reliability has become a crucial factor inassessing its value. The FCU3501 embedded control unit, developed by Forlinx Embedded, is based on the Rockchip RK3588J processor. From the very beginning, it has been designed with the principle of "creating industrial-grade reliability." Through rigorous testing standards and precise engineering, it has become an edge AI product that genuinely meets industrial-grade requirements.

1. Wide-temperature Design and Adaptability to High-and Low-temperature Environments

The industrial environment is often extremely harsh. Factory workshops may experience high temperatures for prolonged periods, while outdoor devices must withstand temperature variations throughout the four seasons. The FCU3501 embedded control unit features a fanless, passive heat dissipation design. It utilizes a triple-layer heat conduction structure that includes a metal shell, a heat sink, and thermal grease. This design allows heat generated by the processor to be quickly conducted to the shell, achieving silent heat dissipation.

This design not only eliminates the failures associated with traditional fan-based heat dissipation systems, which are often caused by dust accumulation, but also guarantees that the device can operate reliably in a wide temperature range, from -40°C to +85°C. During the research and development phase, rigorous high and low temperature cycle tests were conducted on the FCU3501 embedded control unit. This testing method simulates the performance of products in extreme temperature environments. By repeatedly exposing the unit to high and low temperature conditions, its reliability and durability are evaluated.

The high-and low-temperature cycle tests include multiple parameters such as temperature range setting, number of cycles, heating/cooling rate, and holding time. The FCU3501 embedded control unit has successfully passed rigorous tests, ensuring stable operation in both high-temperature workshops and cold outdoor stations during northern winters.

2. Excellent Electromagnetic Compatibility (EMC)

The industrial environment is often filled with electromagnetic interference, which can originate from high-power equipment, frequency converters, and other electrical devices. The FCU3501 embedded control unit has successfully passed rigorous electromagnetic compatibility (EMC) tests to ensure reliable operation in complex industrial electromagnetic environments.

These EMC tests encompass various assessments, including electrostatic discharge tests, electrical fast transient/burst immunity tests, and surge immunity tests. The FCU3501 is specifically designed to comply with the IEC 61000 series of standards and can effectively withstand common electromagnetic interference found in industrial settings.

3. Cold-hot Restart and Power Supply Adaptability

In the industrial environment, power fluctuations and frequent power-on/off operations are common. The power supply design for Forlinx Embedded's FCU3501 embedded control unit has been optimized for reliable startup and operation in various abnormal conditions.

During the testing process, the regulated power supply control software automatically manages the power supply status, ensuring consistent and accurate test conditions. In the test initialization phase, technicians first verify the power interface connection of the device under test. They confirm that the device operates normally during both power-on and power-off processes, and they monitor real-time current to ensure that no overload occurs.

The cold-restart test set a standard of 10,000 power-on/off cycle tests, and the hot-restart test set a standard of 2,083 power-on/off cycle tests. This strict test standard far exceeds the requirements of conventional industrial equipment.

4. International Certifications and Quality Assurance

The FCU3501 embedded control unit has received multiple international certifications, including CE and FCC, ensuring that it meets the essential access requirements of major global markets in terms of safety, electromagnetic compatibility, and environmental protection. These certifications are not just symbols of compliance; they are strong evidence of the product's high quality and reliability.

The CE mark indicates that the FCU3501 complies with European safety, health, and environmental protection standards, while the FCC certification ensures that the device does not interfere with radio frequencies. Together, these certifications provide a passport for the FCU3501 to enter the global market.

CE certification certificate

FCC certification certificate

In summary, the industrial-grade quality of Forlinx Embedded's FCU3501 embedded control unit is not accidental but the result of strict design standards and testing processes. From its wide-temperature working ability from-40°C to 85°C, to its stability in resisting various electromagnetic interferences, and then to comprehensive international certifications, the FCU3501 embedded control unit is truly designed for harsh industrial environments.

Combining the high-performance computing power, industrial-grade reliability, flexible expansion ability, and wide-range scenario applicability of the FCU3501 embedded control unit, it can set a new performance benchmark for edge-computing devices. For industrial users pursuing high reliability and high computing-power density, the FCU3501 embedded control unit is undoubtedly a worthy AI edge-computing product.

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Forlinx Embedded, an NXP gold partner, has officially launched its FET-MX9596-C SoM and thecompanion OK-MX9596-C development board. Built around NXP’s i.MX 95 processor family, the platform targets industrial automation, medical systems, and edge AI applications.

The SoM integrates up to six Arm Cortex-A55 cores, an Arm Cortex-M7 real-time processor running at 800 MHz, and a Cortex-M33 safety core at 333 MHz. It comes with up to 8 GB of LPDDR4x memory and 64 GB of eMMC flash.

A built-in NPU delivers up to 2 TOPS for machine learning inference, while a Mali-G30 GPU supports modern HMI, AR/VR, and 3D rendering. Video capabilities include a hardware ISP plus 4K H.264/H.265 encode and decode.

FET-MX9596-C SoM Main Features

The compact 50 × 68 mm module connects to carrier boards via board-to-board connectors, exposing features not directly accessible on the SoC such as dual PCIe Gen3 and a 10 GbE interface.

The OK-MX9596-C carrier board expands I/O with dual Gigabit Ethernet, a 10 GbE SFP+ cage, three USB Type-A ports, two PCIe slots, RS485, CAN bus, and other standard interfaces.

FET-MX9596-C SoM Dimensions

Security is based on NXP’s EdgeLock Secure Enclave and includes CAAM cryptographic acceleration, TrustZone support, and a Resource Domain Controller for partitioned execution, which together provide secure credential provisioning and lifecycle management while addressing safety and data protection requirements of transportation, healthcare, and industrial systems.

OK-MX9596-C SBC

According to Forlinx, the module is one of the few SoMs in thisfootprint to integrate dual 10 Gbps plus 1 Gbps Ethernet together withup to 8 GB of RAM, 64 GB of eMMC, and multiple high-speed interfaces,providing the bandwidth and resources needed for multitasking andintensive data processing at the edge.

The company will provide Linux BSP support, design documentation, and customization services for integration into long-lifecycle products.

Specifications listed for the OK-MX9596-C:

• Memory & Storage:

  • Up to 8 GB LPDDR4x (SoM)

  • Flash Storage: Up to 64 GB eMMC (SoM)

  • MicroSD slot (SD3.0, 4-bit)

  • QSPI Flash (4-bit XSPI interface)

• Connectivity:

  • 2× Ethernet ports (10/100/1000 Mbps, RJ45, adaptive)

  • 1× 10 GbE XFI SFP+ cage

  • On-board AW-CM358SM Wi-Fi & Bluetooth module

    • Dual-band Wi-Fi (2.4 GHz / 5 GHz)

    • Bluetooth 5.0 w/ audio features

  • 4G connectivity via mini PCIe slot (EC20 / EC25 modulessupported)

• Camera & Display:

  • 1× MIPI DSI (4 lanes, up to 4Kp30 or 3840 × 1440p60)

  • 1× LVDS (dual 8-bit, up to 1080p@60Hz)

  • 1× MIPI CSI camera interface (OV13850 supported)

• Audio:

  • 3.5 mm headphone jack (w/ integrated mic)

  • On-board electret microphone

  • Dual-channel speaker output

  • 1× I²S for BT audio

  • eARC via pin headers

• Expansion:

  • 2× PCIe 3.0 (X1 slots, supports RC and EP modes)

• I/O:

  • 5× CAN FD (isolated, compliant with CAN 2.0B, up to 5Mbps)

  • 1× SDIO (Wi-Fi), 1× UART (BT), 1× I²S (audio)

  • 2× RS485 (auto transceiving, isolated)

  • 1× SPI (via pin headers)

  • 8× SARADC (1.8V, includes sliding rheostat)

• USB:

  • 1× USB Type-C (OTG, power & data)

  • 1× USB Type-C (debug, UART1/2/3 for A55/M33/M7 cores)

  • 3× USB 2.0 Host (expanded by hub, up to 480 Mbps)

• Miscellaneous:

  • 7× Keys (Reset, Sleep mode, Power switch, 4user-defined)

  • RTC

  • Buzzer

  • 4× User-defined LEDs

  • 1x Fan header

  • JTAG & Tamper detection headers

• Power:

  • 5V DC (via barrel jack)

Further Information

Forlinx is offering free evaluation samples of the FET-MX9596-C SoMto qualified developers and system integrators.

The design is industrial-grade, rated for −40 °C to +85 °C, and isbacked by NXP’s 15-year longevity program.

Source: Linuxgizmos

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FET3588-C System on Module based on Rockchip RK3588

FET3588-C SoM

New Generation Advanced AIoT Processor RK3588

As a universal 8K supported SoC, RK3588 is outstanding in integer operations, floating-point arithmetic, RAM, low-power and even the outline.
Advanced 8nm processing, Big & Little core structure and L3 cache, which are all have been greatly improved its computing capability.

NPU With Processing Performance Up To 6 TOPS

RK3588 processor contains a triple-core NPU, supports co-work and work independently;
Supports INT4/INT8/INT16/FP16 hybrid operation and computing power is up to 6TOPs.
MAC utilization improved by more than 28% together with 2.0 RKNN TOOLkit2 can meet most demand for edge computing.

8K Encoder/ Decoders Exploring

The RK3588 supports 8K display output and features high-performance video decoding for H.265/VP9 at 8K@60fps, H.264 at 8K@30fps, and AV1 at 4K@60fps.
It serves as a powerful platform for intensive video applications, offering full compatibility with OpenGL ES 1.1/2.0/3.2, OpenCL up to 2.2, and Vulkan 1.2.
A dedicated 2D hardware engine with MMU maximizes display performance to ensure ultra-smooth operation.

Various Display Interfaces: Quad-Screen Playback with Diverse Content

Various display interfaces such as 2x HDMI 2.1, 2x eDP 1.3, 2x DP 1.4, 2x MIPI-DSI and BT.1120 are available.
Can support quad-screen playing together but with different content, up to 7680x4320@60Hz output, will take users fantastic visual experience.

New Generation ISP Substantially Boosts Image Quality

RK3588 introduces a new generation totally hardware-based maximum 48-Megapixel ISP3.0.
It implements a lot of algorithm accelerators, such as HDR, 3A, LSC, 3DNR, 2DNR, sharpening, dehaze, fisheye correction, gamma correction and so on.

Rich Ready-to-use Peripheral Source

User-Friendly Reference Files and Efficient After-Sale Technical Support

Multiplied Isolation Circuits: Trusting the Board as a Secure Platform

Diverse Application Scenarios Empower Multiple Industrial Sectors

RK3588 SoM & SBC Video

FET3588-C System on Module based on Rockchip RK3588

FET-MX8MPx-SMARC System on Module Based on NXP i.MX 8M Plus Processor

FET-MX8MPx-SMARC SoM

High-speed Communication Interface

4K Picture Quality and HiFi Voice Experience

HDMI interface supports up to 4K display output; it also features LVDS, MIPI-DSI display interface, the latest audio technology, Cadence® Tensilica® HiFi 4 DSP @ 800 MHz, 18x I2S TDM, DSD512, S/PDIF Tx + Rx, 8-channel PDM microphone input, eARC, ASRC.

Advanced Multimedia Technology

3D/2D Graphic Acceleration

Machine Learning and Vision

Built-in NPU with 2.3 TOPS of AI computing power to meet lightweight edge computing needs

Dual Image Signal Processor (ISP)

Product Application

Forlinx i.MX8MP SMARC SOM&SBC Video

Unboxing Forlinx Very First i.MX8M Plus SMARC Development Board

FET-MX9596-C System on Module Based on NXP i.MX95 Series Processor

FET-MX9596-C SoM

NXP New Flagship Chip

NXP i.MX95xx combines high performance application cores, independent MCU real-time domain, Energy Flex architecture, advanced security supported by EdgeLock® secure zone, and dedicated multi-sensor data processing engines (graphics, image, display, audio, and voice), to accelerate edge machine learning applications.

Safety Features

i.MX 95 series has safety features that comply with the ISO 26262 ASIL-B and IEC 61508 SIL-2 functional safety standards to support basic safety measures in automobiles and functional safety in industrial control systems.

Multicore Heterogeneous Architecture

i.MX95xx series features ARM Cortex-A55 high-performance cores along with a Cortex-M7 real-time core,delivering both high computing performance and precise real-time control.

High-performance GPU

The advanced ARM Mali-G310 GPU supports OpenGL® ES 3.2, Vulkan® 1.2, and OpenCL 3.0, delivering stunning graphics and exceptional computing performance.With the ability to manage two independent output streams, it offers versatile functions such as image rotation, resizing, color space conversion,blending, raster operations (ROP), scaling, distortion correction, and linear illumination.

High Computing Power to Empower Edge Applications

The i.MX95xx chip integrates a built-in Neural Processing Unit (NPU) with a high computing power of up to 2 TOPS, which enables excellent machine learning and deep learning capabilities, providing robust support for edge computing applications.

Rich CPU Interfaces

High Definition Decoding and Display Enhancement

The i.MX95xx chip supports H.264 encoding & decoding and H.265 decoding with resolutions up to 4K, easily meeting the demands of playing high-definition videos.At the same time, the chip also utilizes advanced display enhancement technology,which can further improve the contrast and color saturation of the picture, giving users a more stunning visual experience.

ISP Significantly Enhances Image Quality

The ISP technology integrated into the i.MX95xx chip supports various image sensors and is optimized for different application scenarios.Whether it's for industrial inspection, robot vision or autonomous driving applications, the i.MX95xx can provide clear and accurate image data.

Continuously Updated User Profiles

Broad Industry Applications

In multiple industries including industrial, medical, power, automotive transportation, environmental monitoring, smart cabins,and IoT, the FET-MX95xx-C SoM, with its high performance, multifunctionality, and industrial-grade advantages, coupled with Forlinx's competitive pricing and comprehensive after-sales technical support, will help your products quickly enter the market and stay ahead in the industry.

NXP i.MX9596 SoM&SBC Video

All-New FET-MX95xx-C System On Module Based on NXP iMX95 Processor

FET62xx-C SoM

FET62xx-C SoM is powered by TI Sitara Cortex-A53 features AM62 series processors with running speeds up to 1.4GHz
and various peripheral interfaces such as Ethernet with TSN, USB2.0, LVDS, RGB parallel, UART, OSPI, CAN-FD, camera, audio, etc.
FET62xx-C is compatible with single core AM6231, dual-core AM6232 and quad-core AM6254 pin2pin, providing maximum scalability to users.

TI AM62x: Your Next-Generation HMI Solution

AM62x is a new generation of MPU family which is more scalable and extensive than AM335x,
it's designed to address the requirements and goals of Industry 4.0 for factories of the future.

Heterogeneous Multi-core, More security

AM62x is a hybrid processor family integrated with Cortex-A53 core and Cortex-M4F core;
Cortex-M4F with dedicated device level interconnect for security.

CAN-FD Empowers Industrial Automation and Vehicle Applications

AM62x supports 3 CAN-FD up to 5Mbps connecting to industrial networking stably,
providing functional reinforcements for industrial automation and vehicle applications.

GPMC for Parallel Host Interface to An External ASIC/FPGA

AM62x is enabled with GPMC with read/ write rating up to 100MB/s; Besides,
multiple chip-selection provides maximum flexibility for multi-communicating with external peripherals.

Exclusive Triple-display Output

FET62xx-C SoM support two display controllers with different output. Exclusively, it is capable of simultaneously driving three displays.

Target Applications

The SoM could be widely used in Human Machine Interfaces (HMI), Industrial computer,
Edge computing, Retail automation, Driver Monitoring System (DMS/OMS) / In-Cabin Monitoring (ICM),Telematics Control Unit (TCU),
Vehicle to Infrastructure / Vehicle to Vehicle (V2X / V2V),3D Re-configurable automotive instrument cluster, Appliance user interface and connectivity, Medical equipment.

▊ Product Video

Video Demo of AM62x Development board/Kit

FET-MX9352-C i.MX93 System on Module based on NXP i.MX9352 with Dual Cortex-A55 & Ethos-U65 NPU

FET-MX9352-C SoM

Cortex-A55+ Cortex-M33 for Multi Tasks Processing with Low Latency

The i.MX9352 hybrid processor integrates dual Cortex-A55 cores up to 1.7 GHz and a Cortex-M33 real-time core, combining host and slave control in a single compact SoC for multi-task processing and cost-effective system design. High-speed on-chip bus communication between the A-core and M-core ensures efficient and reliable real-time data exchange.

0.5 TOPS NPU: Empowering Low Cost and Light AI Applications

i.MX9352 processor contains an innovative ARM Ethos U-65 microNPU, each cycle with 256 MAC, 0.5 TOPS can meet the demand for high efficient, fast and safe machine learning at edge side.

TSN and CAN-FD: Meeting Digitizing Demands for Industries and Automotive

FET-MX9352-C supports two Gigabit Ethernet ports with one enabled with TSN, in addition to ensuring clock accuracy, it will promote communication between IT and OT, helping to build network with low latency.

Industrial Grade Materials: Fit for Harsh Environments

All materials including capacitor, resistor and connector on FET-MX9352-C system on module are industrial grade, can support the SoM to work in -40℃~+85℃ operating environment very well.

Various Peripheral Interfaces with High Scalability

Long-Term Availability

i.MX 93 family processors was launched in 2023 and is scheduled with long-term supply, the availability will be at least 15 years.

i.MX 9352 SoM & SBC Video

i.MX 93 Demo | FET-MX9352-C SoM & OK-MX9352-S SBC

Mature and Stable

This is the third SOM launched by Forlinx based on NXP i.MX6U series processors.
Matured technical solutions.
Stable and reliable.

Comprehensive Functions

Native support: 2x Ethernet, 2x CAN, 8x UART, 2x USB, RGB LCD, Audio, IIC, SPI, Camera, PWM, ADC, SDIO, GPIO,etc.
Meet the requirements of various application scenarios

Easy to Develop and Product

Separate kernel update
Batch flashing by OTG, SD/TF cards
Convenient for development and mass production.

OKMX6ULL-C Single Board Computer

Matched Development Board, Integrates rich functional interfaces, Makes easy product evaluation.

Target Applications

The SoM could be widely used in electric power, healthcare, industrial control and automation, environmental monitoring,
self-service terminal, security, vehicle transportation, communication, charging piles, smart home, consumer electronic, handheld device, gateway, HMI, etc.

▊ Product Video

Unboxing | OKMX6ULL-C SBC Based on NXP i.MX6ULL A7 Processor

Robust Processing Performance

Quad-core ARM Cortex-A72 processor with frequency up to 1.8GHz, 2GB DDR4 RAM, data throughput up to 2.1GT/s, and CoreMark up to 45000

8 Native Ethernet

up to two XFI(10GbE)

High-speed Network

Data Path Acceleration Architecture(DPAA) incorporating acceleration for Packet parsing, classification, and distribution(FMan), queue management for scheduling, packet sequencing,
and congestion management(QMan), and hardware buffer management for buffer allocation and de-allocation(BMan).
Software supported with DPDK and OVS-DPDK for high performance in network related data packet processing.

Various High-speed Interfaces

5G bps USB3.0, 6Gbps SATA3.0, 10Gbps Ethernet, 32GT/s PCIe3.0(x4)

Flexible Scalability

PCIe2.0(up to 5Gbps) scalable for Ethernet, dual-band WiFi and other high-speed peripherals

COM Express Package Designing

COM Express package designing between SoM and carrier board can provide data transfering rate up to 10GHz, providing a wealth of connectivity and interface options.
COM Express Mini Type 10 with high compatibility makes it flexible for users to custom different SoM for carrier board.

▊ Product Video

OK1046A-C2 SBC Demo | NXP LS1046A processor based

FETMX8MPx-C System on Module Powered by NXP i.MX 8M Plus for AI, Vision, and Industrial Automation

FETMX8MPx-C SoM

High-speed Communication Interface

4K Picture Quality and HiFi Voice Experience

The HDMI interface supports up to 4K display output, alongside LVDS and MIPI-DSI interfaces. It can drive up to three displays, either identical or different.The system integrates advanced audio technologies, including Cadence® Tensilica® HiFi 4 DSP @ 800 MHz, 6x I2S TDM, DSD512, S/PDIF Tx + Rx, 8-channel PDM microphone input, eARC, and ASRC.

Advanced Multimedia Technology

3D/2D Graphics Acceleration

Machine Learning and Vision

Built-in NPU, AI computing capability 2.3TOPS, meeting the needs of lightweight edge computing

Built-in Image Signal Processor (ISP)

High-Version and High-Stability Operating System

Product Applications

iMX8M Plus SoM/SBC Video

OKMX8MPx-C Single Board Computer Demo | iMX8M Plus NXP based

i.MX6Q Core Board With Ultra-thin Connectors

The core board uses 4 sets of ultra-thin 80P board-to-board connectors,
which are only 2mm high and 40mm x 70mm gold size ratio, so that the product design is not limited to any mechanical structure

12-layer PCB Gold Deposition Process

i.MX6Q core board adopts the 12-layer PCB deposition process design,
taking full account of electromagnetic compatibility and signal integrity design, to ensure the stable operation of the system!

The CPU pins are all drawn out to meet the different functional requirements of different products in various fields

i.MX6Q core board leads all pins out of the CPU, supporting gigabit Ethernet, DVP, MIPI camera s, audio, SDHC, and more.
It also supports MIPI cameras, MIPI screens, MLB buses, EIM BUS 27-bit addresses, 32-bit data buses, and more.

Supports a variety of display screen interfaces and image collectors

FETMX6Q-C SoM Supports Dual-screen Synchronous Display, Dual-screen Asynchronous Display

Forlinx embedded i.MX6Q core board supports dual-screen synchronous display, dual-screen asynchronous display.
Asynchronous display supports LVDS and LCD, HDMI and LVDS, HDMI and LCD, LVDS0 and LVDS1.

CE FCC RoHS certified

▊ OKMX6Q-C Development Board

FETMX6Q-C supporting carrier board OKMX6Q-C is rich in interface resources, including mainstream interfaces such as Gigabit Ethernet, CAN-bus, camera, WIFI & Bluetooth, and also introduces CPU-specific functions such as MIPI, MLB, and EIM BUS. The module is ready to run Linux, Android and can support industrial operating temperature range from -40 to +85 Celsius.

Forlinx kindly provides related optional modules for OKMX6Q single board computer/ development kit testing, such as 4.3 inch Resistive LCD Module, 7.0-inch LCD Module with MIPI display, 7.0-inch TFC LCD Module with Capacitive Touch Panel, 7.0-inch TFT LCD Module with Resistive Touch Panel, 10.1-inch LVDS Display with Capacitive Touch Panel, etc.

For More Information

Forlinx OK3588-C Rockchip RK3588 SBC | 8K Video & Quad-Screen Single Board Computer

OK3588-C SBC

Rich Ready-to-use Peripheral Source

8K Encoder/ Decoders Exploring

RK3588 supports 8K display output and high-performance decoding (H.265/VP9 @ 8K60, H.264 @ 8K30, AV1 @ 4K60). It is fully compatible with OpenGLES 1.1/2.0/3.2, OpenCL 2.2, and Vulkan 1.2, making it ideal for massive video playback. A dedicated 2D engine with MMU ensures maximized display performance and ultra-smooth operation.

Various Display Interfaces: Quad-Screen Playback with Diverse Content

Various display interfaces such as 2x HDMI 2.1, 2x eDP 1.3, 2x DP 1.4, 2x MIPI-DSI and BT.1120 are available. Can support quad-screen playing together but with different content, up to 7680x4320@60Hz output, will take users fantastic visual experience.

Multiplied Isolation Circuits: Trusting the Board as a Secure Platform

User-Friendly Reference Files and Efficient After-Sale Technical Support

RK3588 SoM&SBC Video

FCU1501 Industrial Embedded Control Unit

Vertically Integrated Architecture for Long-Term Supply Stability

Two Interfaces, Same Dimensions

It features dual interface configurations within the same form factor, allowing flexible selection for different applications—no installation changes required.
With highly integrated and rich interfaces, a single unit can replace multiple traditional gateways, significantly improving deployment efficiency and system integration.

Industrial Wide-Temp & Level-3 EMC

It is tested for industrial environments from -40°C to +85°C and designed to meet Level 3 EMC standards, ensuring reliable operation in extreme temperatures and strong electromagnetic interference.
It meets the stringent requirements of industries such as power, rail transit, and smart manufacturing for high reliability and environmental adaptability.

Robust Software Ecosystem with Linux 6.1 and Industrial Protocol Support

Powered by Linux 6.1, it integrates mainstream protocols and middleware such as Modbus, TCP/IP, SSH, OpenVPN, Nginx, and reverse proxy.
This enhances system security and compatibility while flexibly supporting industrial communication, remote maintenance, and edge service applications.

Web-Based Visual Management for Effortless O&M

Access the configuration interface directly through a web browser to intuitively manage network settings, communication parameters, and system status.
No additional software or specialized tools are required, significantly reducing maintenance complexity and enabling more efficient, streamlined device management.

Rich Features, True Plug-and-Play Efficiency

Integrated practical features: one-click parameter reset, 4G status indicators, versatile interfaces, power output, and USB firmware upgrade.
No extra accessories needed—enabling rapid deployment, easy maintenance, and higher on-site efficiency.

Flexible Mounting for Any Scenario

Multiple installation methods -- DIN rail mounting, wall mounting, and front-facing bracket mounting—ensuring easy deployment across diverse industrial environments.

Comprehensive Certifications for Reliable Use

CE, FCC, and RoHS certified, with environmental testing to ensure safety, quality, and global compliance.

Application Scenarios

Widely used in power automation, energy storage (EMS), renewable energy, structural monitoring, energy management, residential HEMS, and industrial data acquisition.

FCU1501 Interface Overview

It is an industrial-grade 4G IoT gateway designed for harsh environments (-40°C to +85°C), supporting DIN rail mounting for easy integration.
With dual Ethernet , multiple RS485 ports, and CAN bus, it enables flexible device connectivity and supports Modbus TCP/RTU protocol conversion and passthrough.
Built-in edge computing ensures efficient local processing and reliable remote data acquisition, making it ideal for industrial IoT, smart devices, remote maintenance, and energy applications.

FCU1501 Industrial Embedded Computer Video

FCU1501 Embedded PC: Industry-Grade Data Communication Gateway

OK1126Bx-S (Rockchip RV1126B/RV1126BJ) Edge AI Single Board Computer

Functional Diagram

Full Upgrade

Compared to the RV1126, it offers three major enhancements: boosted CPU and NPU performance, plus an upgraded OS. Enjoy a more powerful, intelligent, and seamless device AI journey.

Comprehensive Pinout & Rich Connectivity

Stamp hole + LGA connection. All functional pins of the RV1126B/RV1126BJ are fully led out, including display interfaces (MIPI-DSI, RGB LCD),
network interfaces (Gigabit RGMII, 100Mbps Ethernet), and various peripherals (CAN FD, UART, SPI, I2C, PWM, ADC, etc.).
The GPIO layout is fully compatible with the Raspberry Pi 40-pin standard.

3TOPS NPU Empowers Edge AI Inference

Independent built - in NPU , providing up to 3TOPS@INT8 AI computing power, supporting INT8/INT16 mixed - precision operations,
and can efficiently run typical edge AI target recognition models such as face detection, safety helmet recognition, fire and smoke alarm,
and area intrusion, realizing local real - time decision - making without relying on the cloud.

Powerful Vision & Multi-channel Video Analytics

-40°C to +85°C Stable 24/7 Operation

The FET1126BJ - S SoM supports - 40°C~+85°C operation, delivering excellent reliability and environmental adaptability in complex settings.

LPDDR4 Memory Design for More Scenarios

An LPDDR4 memory design for lower power consumption. DDR4 commercial-grade chips operate at 0°C - 70°C, while LPDDR4 ones cover - 20°C - 85°C.
With RV1126B (- 20°C - 85°C) and eMMC (- 25°C - 85°C)'s wide-temperature features, the commercial-grade SoM works at - 20°C - 85°C, offering low cost and wide-temperature performance.
It combines low cost with wide-temperature characteristics.

Full Software Ecosystem & Rapid AI Deployment

Equipped with the Linux 6.1 OS, it's a major upgrade from the previous - generation RV1126. It offers full BSP support, including kernel source code, file system, drivers, and the RKNN toolchain. It's also compatible with model conversion of mainstream deep - learning frameworks like TensorFlow, PyTorch, Caffe, and MXNet.

RPi 40-Pin GPIO Compatible for Quick Start

The compact development board features 2 x network ports, display, USB and Wi-Fi interfaces, plus pins matching Raspberry Pi 40-Pin GPIO for testing FET1126B-S/FET1126BJ-S SoM functions and AI development.

Compact Development Board with Complete Interfaces

Compact size, measuring only 120mm×75mm, offers interfaces like network ports, 2 x MIPI - CSI, 1 x MIPI - DSI, and 40Pin GPIO (with UART, SPI, IIC).
It can flexibly expand peripherals and sensors, ideal for embedded vision, edge computing, AIoT, and AI inference.

The Choice for High - End Applications

RV1126B/RV1126BJ SoM&SBC Video

All New FET1126BJ-S SoM: Cost-Effective Edge AI Solution

FAI-ARA240-M Edge AI Accelerator

New NXP DNPU

The NXP Ara240 offers up to 40 eTOPS of AI computing power and supports models such as CNN, VLM, LLM,
and VLA. It has a maximum memory capacity of 16GB and can easily function as a co-processor with various mainstream host platforms.

Powerful Computing Capability

It features the NXP Ara240 high-performance DNPU, providing up to 40 eTOPS of AI computing power and 16GB of memory. It effectively supports complex AI inference tasks at the edge, enhancing efficiency in applications like industrial multimodal sensing and real-time visual processing.

Wide Range of Models

It is compatible with major AI architectures like CNN, Transformers, and GenAI, catering to both traditional vision algorithms and advanced generative AI applications. It efficiently loads complex models, making it ideal for diverse industrial scenarios and highly extensible.

Rich AI Software Development

It provides robust software development tools, featuring an extensible compiler that supports CNNs, Vision Transformers, and large language models for efficient deployment. It works with INT4, INT8, and MSFP16 data types, using flexible quantization and data flow optimization to balance computing power, storage, and accuracy.

M.2 Packaging

Designed with a standard M.2 form factor, it easily integrates with mainstream host platforms, allowing for efficient scaling of AI computing power without complex modifications, thus reducing development costs.

Excellent Heat Dissipation

Optimized thermal architecture ensures stable temperature management under high-load industrial conditions, effectively preventing overheating and performance loss. This guarantees reliable 24/7 operation even in demanding environments.

Continuous Updates of User Documentation

Wide Industry Applications

Delivering robust performance across industrial control , power, new energy, transportation, and healthcare sectors,
this solution combines high computing power and broad model compatibility with dedicated after-sales support from Forlinx Embedded.
Together, these advantages shorten your product's time to market and help you maintain a competitive edge.

OK3576-C Single Board Computer Based on Rockchip RK3576 Processor

OK3576-C SBC

Octa-Core CPU with 8K Video Decoding

RK3576 is a high-performance, low-power AIoT processor from Rockchip. It integrates an octa-core CPU (4×Cortex-A72 + 4×Cortex-A53) and a 6TOPS NPU. The architecture features an embedded 3D GPU and a dedicated 2D hardware engine with MMU for optimized display performance, supporting H.265 8K Ultra HD hardware decoding.

True Hardware Isolation

The RK3576 features a hardware Firewall to manage access permissions between the master and peripherals/memory, ensuring hardware resource isolation. This enhances system stability and security across diverse application scenarios.

6 TOPS NPU for AI Acceleration

6TOPS super-computing power NPU, support INT4/INT8/INT16/FP16/BF16/TF32 operation, support dual-core work together or work independently, support multi-task, multi-scenario parallel, support deep learning frameworks: TensorFlow, Caffe, Tflite, Pytorch, Onnx NN, Android NN, etc.

Ultra Clear Display + AI Intelligent Repair

Supports H.264/H.265 encoding and decoding with five output interfaces: HDMI/eDP, MIPI DSI, Parallel, EBC, and DP. It enables triple-screen independent display at 4K@120Hz, featuring super-resolution and intelligent image enhancement (de-blurring & frame rate upscaling) for diverse scenarios.

New Parallel FlexBus Interface

FlexBus: A flexible parallel interface supporting 2/4/8/16-bit data transmission at up to 100MHz, capable of emulating standard or custom protocols. The RK3576 also integrates extensive connectivity, including DSMC, CAN-FD, PCIe 2.1, SATA 3.0, USB 3.2, SAI, I2C, I3C, and UART.

Rich Ecosystem for Rapid Development

Versatile Applications Across Industries

Targeting Industrial, AIoT, Edge Computing, and Smart Terminals, the FET3576-C offers a versatile platform for digital multimedia.
Backed by Forlinx’s expert technical support, you can accelerate time-to-market and gain a competitive edge in your industry.

RK3576 SoM/SBC Video

Forlinx Launched FET3576 System on Module powered by the Rockchip RK3576 processor

OK153-S12 Mini Industrial Single Board Computer(SBC) Based on Allwinner T153

OK153-S12 Mini SBC

Raspberry Pi 40-Pin GPIO Interface

The OK153-S12 Mini board includes a Raspberry Pi–compatible 40-pin GPIO for easy connection to external hardware.

OK153-S12 Mini SBC Video

OK153-S12 Mini SBC: Low-Cost | 4*A7+RISC-V | RaspberryPi GPIO Header

FET1126Bx-S (Rockchip RV1126B/RV1126BJ) Industrial System on Module / Computer on Module

Functional Diagram

Full Upgrade

Compared to the RV1126, it offers three major enhancements: boosted CPU and NPU performance, plus an upgraded OS. Enjoy a more powerful, intelligent, and seamless device AI journey.

Comprehensive Pinout & Rich Connectivity

Stamp hole + LGA connection. All functional pins of the RV1126B/RV1126BJ are fully led out, including display interfaces (MIPI-DSI, RGB LCD),
network interfaces (Gigabit RGMII, 100Mbps Ethernet), and various peripherals (CAN FD, UART, SPI, I2C, PWM, ADC, etc.).
The GPIO layout is fully compatible with the Raspberry Pi 40-pin standard.

3TOPS NPU Empowers Edge AI Inference

Independent built - in NPU , providing up to 3TOPS@INT8 AI computing power, supporting INT8/INT16 mixed - precision operations,
and can efficiently run typical edge AI target recognition models such as face detection, safety helmet recognition, fire and smoke alarm,
and area intrusion, realizing local real - time decision - making without relying on the cloud.

Powerful Vision & Multi-channel Video Analytics

-40°C to +85°C Stable 24/7 Operation

The FET1126BJ - S SoM supports - 40°C~+85°C operation, delivering excellent reliability and environmental adaptability in complex settings.

LPDDR4 Memory Design for More Scenarios

An LPDDR4 memory design for lower power consumption. DDR4 commercial-grade chips operate at 0°C - 70°C, while LPDDR4 ones cover - 20°C - 85°C.
With RV1126B (- 20°C - 85°C) and eMMC (- 25°C - 85°C)'s wide-temperature features, the commercial-grade SoM works at - 20°C - 85°C, offering low cost and wide-temperature performance.
It combines low cost with wide-temperature characteristics.

Full Software Ecosystem & Rapid AI Deployment

Equipped with the Linux 6.1 OS, it's a major upgrade from the previous - generation RV1126. It offers full BSP support, including kernel source code, file system, drivers, and the RKNN toolchain. It's also compatible with model conversion of mainstream deep - learning frameworks like TensorFlow, PyTorch, Caffe, and MXNet.

RPi 40-Pin GPIO Compatible for Quick Start

The compact development board features 2 x network ports, display, USB and Wi-Fi interfaces, plus pins matching Raspberry Pi 40-Pin GPIO for testing FET1126B-S/FET1126BJ-S SoM functions and AI development.

Compact Development Board with Complete Interfaces

Compact size, measuring only 120mm×75mm, offers interfaces like network ports, 2 x MIPI - CSI, 1 x MIPI - DSI, and 40Pin GPIO (with UART, SPI, IIC).
It can flexibly expand peripherals and sensors, ideal for embedded vision, edge computing, AIoT, and AI inference.

The Choice for High - End Applications

RV1126B/RV1126BJ SoM&SBC Video

All New FET1126BJ-S SoM: Cost-Effective Edge AI Solution

FCU2601 Embedded Computer: CRA-Compliant Energy Management Unit for C&I Energy Storage Systems

FCU3011 AI Edge Computing Device Based on NVIDIA Jetson Orin Nano with Up to 40 TOPS Performance

AI Edge Computing Box FCU3011

Jetson Orin Nano Technical Specification

Powerful AI Performance

40 TOPS high-performance AI core, perfect for embedded & edge computing. Supports real-time tasks like recognition, analysis, inference & HD video codec for smart edge apps.

AI Empowered by 5G Connectivity

The AI edge computing terminal FCU3011 combines powerful AI computing power with 5G access capabilities, truly realizing the intelligent empowerment of the 5G + AI industry!

CUDA, cuDNN, and TensorRT power AI
Easy to Develop with Powerful AI Performance

Rich Functional Interfaces
One - Stop Computing + Control

4× Gigabit Ethernet & 4× USB 3.0 for multi-HD cameras, dual storage (TF + SSD), optional 4G/5G & dual-band Wi-Fi, and RS-485/CAN industrial interfaces.

Interface Electrostatic Protection for More Stable Operation

All Ethernet, USB, RS485, and CAN interfaces feature ESD Level 3 protection, with ±6KV contact discharge and ±8KV air discharge, ensuring long-term stable and reliable operation.

Small Size, Fanless Design

It has rich functional interfaces and a compact size; the optimized passive heat dissipation design ensures full - power operation of 40 TOPS computing power.

User-Friendly Design for Easier Productization

Forlinx Embedded FCU3011 supports easy system updates via OTG (Linux) or USB flash drive (Windows), facilitating development and after-sales maintenance. It also provides tools for enterprise customization, including logo modification.

Rich Documentation

Detailed documentation is provided with the product, including a product user manual, complete CUDA cases, interface test routines, and 3D assembly drawings, comprehensively assisting your AI application development.

Application Areas

Forlinx Embedded AI edge computing terminal FCU3011 is ideal for portable medical devices, AGVs, small commercial robots, intelligent road analysis, visual inspection, and smart factories, delivering the high computing power required for edge AI applications.