FET-MX9352-C SoM and OK-MX9352-C SBC are designed and developed based on NXP i.MX 93 series processors.
OK-MX9352-C Single Board Computer based on NXP i.MX 93 family i.MX9352 SoC
Forlinx OK-MX9352-C single board computer consists of FET-MX9352-C SoM separated from carrier board, SoM could be connected to carrier board by high-speed connectors, which is much convenient for plug/ unplug operations with high reliability. The board has rich common connectors and ports on it, such as Ethernet, UART, CAN-FD, RS485, 4G slot, WiFi, etc. It's been rigorously tested and approved to be a reliable evaluation and reference for users. What's more, it's pin-to-pin compatible iMX91 SoM solution is also scheduled.
OK-MX9352-C SBC
TSN and CAN-FD: Meeting Digitizing Demands for Industries and Automotive
FET-MX9352-C supports two Gigabit Ethernet ports with one enabled with TSN, in addition to ensuring clock accuracy,
it will promote communication between IT and OT, helping to build network with low latency.
0.5 TOPS NPU: Empowering Low Cost and Light AI Applications
i.MX9352 processor contains an innovative ARM Ethos U-65 microNPU, each cycle with 256 MAC,
0.5 TOPS can meet the demand for high efficient, fast and safe machine learning at edge side.
Industrial Grade Materials: Fit for Harsh Environments
All materials including capacitor, resistor and connector on FET-MX9352-C system on module are industrial grade, can support the SoM to work in -40℃~+85℃ operating environment very well.
Various Peripheral Interfaces with High Scalability
Long-Term Availability
i.MX 93 family processors will be launched in 2023 and is scheduled with long-term supply, the availability will be at least 15 years.
Target Applications
▊ i.MX 9352 SoM & SBC Video
i.MX 93 Demo | FET-MX9352-C SoM & OK-MX9352-S SBC
▊ Hardware Features
|
FET-MX9352-C SoM Features |
|
|---|---|
|
Processor |
NXP i.MX93 i.MX9352 CPU: 2× [email protected] + 1× Cortex-M33@250MHz NPU: 0.5 TOPS |
|
RAM |
1GB LPDDR4 |
|
ROM |
8GB eMMC |
| Power input | DC 5V |
|
Operating temperature width |
-40℃ ~ 85℃ |
|
Packaging |
board to board connector(2x 100-pin connector with pitch of 0.4mm, combined height 1.5mm) |
|
Dimensions |
33x 48mm |
|
Specifications |
||
|---|---|---|
|
Interface |
QTY |
Spec. |
|
LVDS |
1 |
single 4-lane supports 720p60, and can support up to 1366x768p60 or 1280x800p60 |
|
RGB parallel |
1 |
RGB888, up to 1366x768p60 or 1280x800p60 |
|
MIPI DSI |
1 |
1x 4-lane MIPI-DSI, pixel from LCDIF; compatible with both MIPI DSI v1.2 and MIPI D-PHY v1.2; up to 200MHz pixel clock, pixel filling rate 140 Mpixel/s, 24-bit RGB; supports resolution 1080p60 or 1920x1200p60, each lane with data rating up to 1.5Gbps |
|
Ethernet |
≤2 |
supports 2x RGMII, one supported with TSN; the one with TSN Ethernet QoS supports 802.1Qbv and 802.1Qbu and time based scheduling; 10/ 100 / 1000Mbps, complies with IEEE 802.3 |
| UART |
≤8 |
up to 5Mbps |
| CAN-FD | ≤2 | complies with CAN-FD and CAN 2.0B |
| USB |
≤2 |
two USB2.0 controllers with PHY integrated |
| SD card |
≤1 |
complies with USB3.0; SDR up to 200MHz, and DDR speed up to 50MHz |
| SDIO |
≤1 |
SDIO3.0 |
| SAI |
≤3 |
SAI1 supports 2 lanes, SAI2 supports 4 lanes, and SAI3 supports 1 lane; supports full-duplex serial, such as I2S, AC97, TDM and codec/ DSP |
| SPDIF | 1 |
supports raw capture mode supports L-PCM and IEC61937; |
| PDM | 1 | 24-bit, supports liner phase response and AOP MIC |
|
MIPI CSI |
1 |
compatible with MIPI CSI-2 v1.3 and MIPI D-PHY v1.2; supports up to 2 RX data lanes (and 1 RX clock lane); pixel clock up to 200MHz, up to 150Mpixel/s pixel filling rate under rated voltage and super speed voltage |
|
SPI |
≤8 |
master/ slave mode can be set |
|
I2C |
≤8 |
up to 100Kbit/s under standard mode, 400Kbit/s under fast speed mode, 1000Kbit/s under enhanced fast speed mode, 3400Kbit/s under high speed mode, and 5000Kbit/s under super fast speed mode; slave mode is available for high speed mode and super fast speed mode |
|
I3C |
≤2 |
supports 400Kbit/s fast speed mode and 1000Kbit/s enhanced fast speed mode, it's backwards compatible with I2C; clock up to 12.5M, supports HDR-DDR mode |
|
ADC |
≤4 |
1x 12-bit 4-lane 1MS/s ADC |
|
JTAG |
1 |
to debug Cortex-M33 |
▊ Carrier Board
|
|
| OK-MX9352-C Carrier Board Features | |||
|---|---|---|---|
|
Peripheral interfaces |
QTY |
Spec. |
|
|
LCD |
1 |
• RGB888 24-bit, up to 1366×768p60 or 1280×800p60 |
|
|
LVDS |
1 |
• single 8-bit, up to 1366×768p60 or 1280×800p60 |
|
|
MIPI DSI |
1 |
• 4 lanes, up to 1920×1200p60 |
|
|
TF card slot |
1 |
• 1, for OS image flashing, complies with SD card 3.0 protocol |
|
|
4G |
1 |
• Mini-PCIe slot, available for EC20 module with external antenna |
|
|
Ethernet |
2 |
• 2x 10M/100M/1000M RJ45 connector, ENET1/ETH1 supports TSN |
|
|
GPIO |
28 |
• dual-row pin headers, multiplexed with LCD |
|
|
ADC |
4 |
• 12-bit ADC with sampling rate 1MS/s |
|
|
CAN-FD |
2 |
• with static, surge and pulse protection circuits level 4, and Galvanic isolation complies with CAN2.0B |
|
|
RS-485 |
2 |
• with static, surge and pulse protection circuits level 4, and Galvanic isolation with automatic transceiving control |
|
|
USB2.0 |
2 |
• USB1 by TYPE-C, can be used for OS image flashing; • USB2 is expanded from HUB, circuited to 4G, WiFi /BT, USB to 4 serial, and USB-A feamale connector |
|
|
UART |
2 |
• 3.3V TTL, by pin headers with pitch of 2.54mm |
|
|
WiFi & BT |
1 |
• on-board BL-M8723DU, 2.4GWiFi, Bluetooth 2.1/4.2 |
|
|
RTC |
1 |
• on-board RTC battery holder, for real-time updating |
|
|
Audio |
1 |
• 1 four-part phone jack with dual-channel HP and MIC and 2 speaker jacks. |
|
|
Camera |
1 |
• MIPI-CSI, fits OV5645 module |
|
|
KEY |
3 |
• reset, power on/ off and user key |
|
|
LED |
1 |
• user defined |
|
|
GPIO |
9 |
• 9xGPIO(3.3V), 5V, 3.3V and 1.8V power by pin headers with pitch of 2.54mm |
|
|
DEBUG |
1 |
• serial converted to USB for debug, TYPE-C connector |
|
|
JTAG |
1 |
10-pin(2×5) headers with pitch of 2.0mm |
|
▊ Downloads
Catalog:
Forlinx Catalog Manual
Datasheet:
FET-MX9352-C SoM and OK-MX9352-C introduction
|
Linux4.19 |
User manual, compiling guideline, kernel source code, file system, OS image, VM ubuntu image, SD card tool, USB OTG tool, QT demos and source code |
| Hardware | User manual, carrier board schematic, carrier board PCB(AD), datasheet, carrier board and SoM DXF files, pinmux sheet |
▊ Accessories
Provides the modules and accessories used in Forlinx's i.MX93 development board.
See here for communication modules, Evaluation Kit, LCD screen, SBC expansion module and further accessories »
▊ How to buy
1. Order Online
We have an online store on Alibaba, please contact us to start ordering
2. Order offline
pls send your inquiry to our mailbox [email protected];
3. Payment Terms
Samples(100% T/T in advance),Bulk Order(please contact with our sales)
▊ Shipment
1. Delivery: Goods will be sent out by express as requested
2. Lead time: generally, goods could be sent out within five working days for a sample order, for a bulk requirement order, please contact us to check stock status and estimated delivery time.
3. Shipping charge: buyers should bear related shipping cost.
Product Shipping List |
|
|---|---|
| FET-MX9352-C System on Module | 1 |
| OK-MX9352-C Carrier Board | 1 |
| 12V Power adapter | 1 |
| USB Type-C | 1 |
| Get the Price | |
▊ Related News
- How to Configure NXP i.MX9352's GPIO?
- FORLINX Embedded Launches SOM based on NXP i.MX 9352
- World Debut! FET-MX9352-C System on Modules was Launched
▊ Other Forlinx NXP Series Products
Architecture: 2*A55+M33
Frequency: 1.5GHz
RAM: 1GB LPDDR4
ROM: 8GB eMMC
System: Linux 5.15.52+Qt 6.3.2
Architecture: 4*A53+M7
Frequency: 1.6GHZ
RAM: 2GB/4GB LPDDR4
ROM: 16GB eMMC
System: Linux5.4.70+Qt5.15, Android 11
Architecture: Cortex-A7
Frequency: 800MHz
RAM: 512MB DDR3
ROM: 8GB eMMC
System: Linux4.1.15+QT5.6
Architecture: Cortex-A9
Frequency: 1.0GHz
RAM: 1GB DDR3，2GB DDR3(optional)
ROM: 8GB eMMC
System: Linux3.0.35+QT4.8.5，Linux4.1.15+QT5.6，Android4.2，Android6.0
